Nexperia USA Inc. 74AUP1T97GW-Q100H

Overview

74AUP1T97GW-Q100 from Nexperia is an automotive-grade, low-power configurable logic gate with Schmitt-trigger inputs and voltage-level translation capability. It implements MUX, AND, OR, NAND, NOR, inverter, or buffer functions via 3-bit input configuration, operates across 2.3 V to 3.6 V supply, supports -40 °C to +125 °C ambient, and features IOFF partial power-down protection for mixed-voltage system interconnects in body control modules.

For engineers reviewing the 74AUP1T97GW-Q100 datasheet, 74AUP1T97GW-Q100 pinout, 74AUP1T97GW-Q100 application, or 74AUP1T97GW-Q100 equivalent, this device serves as a single-gate logic configurator enabling level-shifting between 1.8 V and 3.3 V domains while maintaining ultra-low static current (≤1.5 μA) and robust noise immunity in automotive ECUs.

Technical Context

This device integrates three Schmitt-trigger inputs (A, B, C), one CMOS output (Y), and dual-rail compatible I/O architecture enabling direct interfacing between sub-1.8 V logic and 3.3 V systems. Its hysteresis (0.10–0.60 V) and overvoltage-tolerant inputs (up to 3.6 V) ensure reliable operation under noisy automotive conditions.

The IOFF circuit actively disables output leakage when VCC = 0 V, preventing backflow current during partial power-down - critical for domain-isolated vehicle networks. Function selection is determined solely by static input states, requiring no clock or configuration register access.

Key Specifications

Pinout & Package

TSSOP6 plastic thin shrink small outline package (SOT363-2); 6-lead, 1.25 mm body width; pin 1 indicator located below marking code in lower-left corner.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar configurable gate applications.

Compared with SN74LVC1G97DRYR, the 74AUP1T97GW-Q100 delivers guaranteed automotive reliability and partial power-down safety; versus 74AUP1T98GW-Q100, it offers lower static power and simpler layout for single-path applications.

Availability

74AUP1T97GW-Q100 is available at Aetrix Electronics and suitable for automotive body control modules, door module interfaces, ADAS camera power sequencing, and infotainment system wake-up logic requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for 74AUP1T97GW-Q100 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a leading semiconductor manufacturer specializing in high-performance logic, analog, and MOSFET solutions optimized for automotive, industrial, and mobile applications.

The 74AUP1T97GW-Q100 belongs to Nexperia's AUP (Advanced Ultra-low Power) logic family, designed specifically for energy-constrained automotive subsystems requiring robust noise immunity, level translation, and fail-safe power-down behavior.

FAQ

Can 74AUP1T97GW-Q100 operate with 1.8 V supply?

No. The device requires VCC between 2.3 V and 3.6 V per its recommended operating conditions. However, its Schmitt-trigger inputs accept 1.8 V logic levels while powered at 3.3 V - enabling interface with 1.8 V controllers without external translators.

What happens to the output during partial power-down (VCC = 0 V)?

When VCC drops to 0 V, the IOFF circuit disables the output, placing Y in high-impedance state with ≤±0.75 μA leakage current. This prevents backflow current into powered sections of the system, satisfying ISO 16750-2 load-dump and battery-disconnect requirements.

How is logic function selected on this device?

Function selection is determined solely by the static voltage states applied to inputs A, B, and C - no clock, programming, or configuration register is involved. The truth table in Section 7 defines Y output for each of the eight possible 3-bit input combinations.

Is pin 1 orientation marked on the package?

Yes. Per datasheet Figure 2 and Table 2, the pin 1 indicator is located on the lower-left corner of the TSSOP6 package, directly below the marking code "59", and is visible as a beveled edge or dot depending on packaging variant.