NXP Semiconductors 74AUP1T98GM,132

Overview

74AUP1T98GM,132 from Nexperia is a single-supply, low-power configurable logic gate with Schmitt-trigger inputs and voltage-level translation capability. It implements MUX, AND, OR, NAND, NOR, inverter, or buffer functions via 3-bit input configuration (A/B/C), operates from 2.3 V to 3.6 V, supports partial power-down via IOFF, and delivers <1.5 μA max ICC at 125 °C ambient. It enables interoperability between 1.8 V logic and 3.3 V systems in space-constrained industrial control interfaces.

For engineers reviewing the 74AUP1T98GM,132 datasheet, 74AUP1T98GM,132 pinout, 74AUP1T98GM,132 application, or 74AUP1T98GM,132 equivalent, this device serves as a drop-in configurable logic solution for mixed-voltage signal routing, I/O bridging, and noise-immune level-shifting in battery-powered and thermally demanding embedded subsystems where footprint and static power are critical.

Technical Context

The 74AUP1T98GM,132 uses CMOS technology with Schmitt-trigger inputs (VT+ = 0.75–1.19 V, VT− = 0.46–0.85 V at VCC = 3.0–3.6 V) to ensure robust noise immunity and clean switching across varying input thresholds. Its IOFF circuit actively disables outputs during power-down, blocking backflow current when VCC = 0 V.

Function selection is determined by the logic states of inputs A, B, and C per Table 4 - enabling real-time reconfiguration without external components. All inputs tolerate up to 3.6 V regardless of VCC, supporting true bidirectional level translation between sub-1.8 V and 3.3 V domains.

Key Specifications

Pinout & Package

XSON6 package (SOT886): plastic extremely thin small outline, no leads, 6 terminals, body size 1.0 × 1.45 × 0.5 mm, thermal pad not present, moisture sensitivity level MSL3.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar configurable logic gate applications.

Compared with SN74LVC1G98DRYR and 74LVC1G97GW,125, the 74AUP1T98GM,132 uniquely combines Schmitt-trigger noise immunity, IOFF-enabled partial power-down, and sub-μA static current - making it the sole option for thermally stressed, battery-operated, or mixed-voltage industrial edge nodes requiring zero-failure signal integrity.

Availability

74AUP1T98GM,132 is available at Aetrix Electronics and suitable for industrial sensor interfaces, portable medical devices, automotive body control modules, and smart home hub signal routing requiring stable component supply across extended temperature ranges and ultra-low power budgets.

Supply support for 74AUP1T98GM,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a leading semiconductor manufacturer specializing in high-performance, energy-efficient logic, analog, and discrete components, with global R&D and manufacturing facilities focused on automotive, industrial, and mobile applications.

The 74AUP (Advanced Ultra-low Power) product line is engineered for ultra-low static/dynamic power consumption and robust operation in thermally constrained, battery-powered, and mixed-voltage embedded systems - targeting design-in where reliability and efficiency are non-negotiable.

FAQ

Can the 74AUP1T98GM,132 operate with VCC = 2.3 V while accepting 1.8 V inputs?

Yes. The device's Schmitt-trigger inputs accept VI down to 0 V and up to 3.6 V regardless of VCC, and its minimum VCC is 2.3 V. At VCC = 2.3 V, VT+ is 0.60–1.10 V and VT− is 0.33–0.64 V, ensuring reliable recognition of 1.8 V logic HIGH (≥1.10 V) and LOW (≤0.33 V) with hysteresis margin.

What happens to the Y output when VCC is removed?

When VCC = 0 V, the IOFF circuit forces the Y output into a high-impedance state, limiting leakage to ±0.75 μA. This prevents back-driving of upstream logic or damage to downstream circuits - a key requirement for hot-pluggable modules and multi-rail power sequencing.

How is logic function selected on the 74AUP1T98GM,132?

Function selection is determined solely by the logic states of inputs A, B, and C per Table 4 in the datasheet. For example: C=L, B=H, A=L configures the device as a buffer; C=H, B=L, A=L configures it as an inverter. No external programming or clocking is required - configuration is static and immediate.

Is the XSON6 (SOT886) package of 74AUP1T98GM,132 compatible with standard reflow profiles?

Yes. The SOT886 package is qualified for IPC/JEDEC J-STD-020 moisture sensitivity level MSL3 and supports standard lead-free reflow profiles (peak 260 °C, 20–40 s above 217 °C). Its 1.0 × 1.45 mm footprint and 0.5 mm height allow placement in ultra-thin assemblies without thermal shadowing issues.