Nexperia USA Inc. 74AUP1Z04GN,132
- Part No.:
- 74AUP1Z04GN,132
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Specialty Logic
- Package:
- -
- Datasheet:
-
74AUP1Z04GN,132.pdf
- Description:
- NEXPERIA 74AUP1Z04GN - BUS DRIVE
- Quantity:
- Payment:

- Shipping:

Inventory:105,000
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Product details
Overview
74AUP1Z04GN,132 from Nexperia is a low-power crystal oscillator driver IC with integrated enable input and internal bias resistor, designed for Pierce oscillator configurations. It operates across 0.8 V to 3.6 V supply, delivers propagation delays as low as 0.7 ns (X1→X2, VCC = 2.3–2.7 V, CL = 5 pF), features Schmitt-trigger EN input for noise immunity, and supports industrial temperature range (−40 °C to +125 °C). It enables compact, low-power timing solutions in battery-powered IoT sensors and portable medical devices.
For engineers reviewing the 74AUP1Z04GN,132 datasheet, 74AUP1Z04GN,132 pinout, 74AUP1Z04GN,132 application, or 74AUP1Z04GN,132 equivalent, key selection criteria include its dual-output topology (X2 and Y), internal Rbias (~1.07–3.11 MΩ), ultra-low ICC (≤75 μA), IOFF power-down capability at output Y, and XSON6 package (0.9 × 1.0 × 0.35 mm) for space-constrained PCB layouts.
Technical Context
The 74AUP1Z04GN,132 implements an inverting amplifier stage with internal bias network (Rbias) and pull-up resistor (RPU) on X1, enabling self-biased Pierce oscillator operation without external components. Its EN input (active LOW) controls device enable/disable state, placing X1 HIGH, X2 LOW, and Y HIGH in disable mode via internal resistive termination.
It uses CMOS AUP logic family architecture optimized for sub-1-V operation, featuring Schmitt-trigger EN input with hysteresis across full VCC range (0.8–3.6 V), IOFF circuitry isolating Y during power-down, and dynamic characteristics specified up to 30 pF load capacitance with propagation delay variation tightly controlled over −40 °C to +125 °C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 0.8 V to 3.6 V - Enables direct interface with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters. |
| Propagation Delay (X1→X2) | 0.7 ns (min, VCC = 3.0–3.6 V, CL = 5 pF) - Supports high-frequency crystal drive up to ~300 MHz fundamental oscillation with tight timing margin. |
| IOFF Leakage (Y output) | ±0.75 μA max (VCC = 0 V) - Ensures minimal current draw and signal integrity when system is powered down but Y remains connected. |
| Bias Resistance (Rbias) | 1.07–3.11 MΩ - Sets stable mid-supply operating point for linear-region amplification of crystal feedback signal. |
| Input Capacitance (X1) | 1.5 pF - Minimizes crystal load perturbation and maintains frequency accuracy per manufacturer's CL specification. |
| Power Dissipation Cap. (CPD) | 24.9 pF (VCC = 3.0–3.6 V) - Enables accurate dynamic power calculation: PD = CPD × VCC² × fi × N. |
| Operating Temperature | −40 °C to +125 °C - Qualified for under-hood automotive, industrial control, and extended-range portable electronics. |
Pinout & Package
XSON6 package (SOT1115): extremely thin small outline, no leads, 6-terminal surface-mount package measuring 0.9 mm × 1.0 mm × 0.35 mm body height.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - EN | Enable input (active LOW) | Drives device into low-power disable mode; Schmitt trigger ensures robustness against slow-rising/falling control signals. |
| 2 - GND | Ground reference | Primary return path for all internal currents; must be low-inductance connection to minimize switching noise coupling. |
| 3 - X1 | Inverting amplifier input / crystal node | Connects to one terminal of quartz crystal; internal RPU pulls X1 HIGH when EN = HIGH (disabled). |
| 4 - X2 | Inverting amplifier output / crystal node | Drives second crystal terminal; forms feedback loop with X1 and external load capacitors C1/C2 in Pierce configuration. |
| 5 - VCC | Positive supply rail | Supplies core logic and output drivers; decoupling capacitor (≥100 nF) required within 2 mm of pin 5. |
| 6 - Y | Buffered output (inverted X1) | Provides clean, isolated clock output; IOFF functionality prevents backfeed when VCC = 0 V. |
Key Features
| Feature | Design Value |
|---|---|
| Wide VCC range (0.8–3.6 V) | Supports single-supply operation across multiple voltage domains - eliminates need for dedicated 1.8 V or 2.5 V regulators in mixed-voltage systems. |
| Internal Rbias and RPU | Removes requirement for two external bias resistors, reducing BOM count and PCB area while ensuring repeatable startup behavior. |
| IOFF circuitry on Y output | Prevents current backflow into Y when VCC is unpowered - critical for hot-swap, partial-power-down, and multi-rail system architectures. |
| Low noise overshoot/undershoot | <10 % of VCC - Reduces EMI emissions and minimizes risk of false triggering in adjacent sensitive analog or RF sections. |
| ESD protection (HBM/CDE) | HBM >5000 V, CDM >1000 V - Provides robust handling margin during SMT assembly and field operation without additional protection devices. |
Applications
| Wearable Health Monitor | Automotive Body Control Module |
|---|---|
|
Use Scenario: Ultra-low-power ECG sensor node sampling at 250 Hz with BLE transmission every 30 seconds. IC Role / Device Role / Timing Role: Crystal driver generating stable 32.768 kHz real-time clock (RTC) reference for microcontroller sleep/wake scheduling and timestamping. Use Value: 75 μA ICC enables >5-year battery life on CR2032; XSON6 footprint (0.9 × 1.0 mm) fits within constrained flex PCB area near sensor ASIC. |
Use Scenario: Door module controlling window lift, mirror fold, and interior lighting with CAN communication. IC Role / Device Role / Timing Role: Primary 16 MHz system clock source for 32-bit MCU, driving CAN controller and PWM peripherals. Use Value: −40 °C to +125 °C rating ensures reliable startup at cold soak and under-hood thermal stress; IOFF prevents clock feedthrough during MCU reset sequences. |
| Industrial Wireless Sensor Node | Portable Diagnostic Ultrasound Probe |
|
Use Scenario: LoRaWAN-enabled temperature/humidity node deployed in remote factory environments. IC Role / Device Role / Timing Role: Low-jitter 4 MHz clock generator for ADC sampling and RF transceiver synchronization. Use Value: Propagation delay stability (±0.3 ns over temp) maintains precise sampling phase alignment; 0.35 mm profile avoids interference with stacked antenna layers. |
Use Scenario: Handheld ultrasound probe requiring low-noise, low-power timing for beamforming FPGA and analog front-end. IC Role / Device Role / Timing Role: Dual-output driver supplying 40 MHz master clock to FPGA and buffered 10 MHz reference to ADC/DAC subsystems. Use Value: Isolated Y output prevents digital switching noise from coupling into analog signal chain; <10 % overshoot meets IEC 60601 EMC limits. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar crystal driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 74AUP1G04GW,125 | No internal Rbias or RPU; requires external bias network; TSSOP6 package (1.25 mm width). | Lacks integrated oscillator support - suitable only for generic inverter use, not standalone crystal drive. | Select only if external biasing is preferred for tuning flexibility or legacy board reuse. |
| SN74LVC1G04DBVR | No EN pin; no internal bias resistors; higher ICC (1 μA typical); SOT-23-5 package. | Cannot enter low-power disable state; unsuitable for RTC backup or intermittent operation modes. | Choose only for simple signal inversion where enable control and ultra-low standby current are unnecessary. |
Compared with 74AUP1Z04GN,132, the 74AUP1G04GW,125 demands external biasing and lacks enable control, while SN74LVC1G04DBVR offers no power-gating capability and higher static current - making the 74AUP1Z04GN,132 uniquely suited for autonomous, battery-critical oscillator designs.
Availability
74AUP1Z04GN,132 is available at Aetrix Electronics and suitable for wearable health monitors, automotive body control modules, industrial wireless sensor nodes, and portable diagnostic ultrasound probes requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for 74AUP1Z04GN,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance, reliable, and energy-efficient components for automotive, industrial, and consumer applications.
The 74AUP1Z04GN,132 belongs to Nexperia's Advanced Ultra-low Power (AUP) logic family, engineered specifically for crystal oscillator circuits demanding minimal quiescent current, wide voltage operation, and ultra-small packaging in space- and power-constrained systems.
FAQ
What is the function of the Y output versus the X2 output?
The X2 output directly drives one side of the crystal in the Pierce oscillator loop, providing high-gain feedback essential for oscillation startup and sustainment. The Y output is a buffered, inverted replica of X1 - it is electrically isolated, supports IOFF during power-down, and delivers a clean, low-skew clock signal to downstream logic without loading the oscillator core. This separation prevents frequency pulling and improves system-level timing integrity.
Can the 74AUP1Z04GN,132 drive crystals above 32.768 kHz?
Yes - the 74AUP1Z04GN,132 is characterized for operation with fundamental-mode crystals up to at least 50 MHz, supported by its 0.7 ns minimum propagation delay (X1→X2) and low output capacitance (1.7 pF). Application note AN11122 confirms stable oscillation with 1–20 MHz crystals; higher frequencies require careful layout, appropriate load capacitance matching (CL), and verification of drive level to avoid crystal overstress.
How does the internal Rbias affect oscillator stability?
The internal Rbias (1.07–3.11 MΩ) establishes a DC bias point near VCC/2 at the X1 input, positioning the inverting amplifier in its high-gain linear region. This ensures optimal loop gain and consistent startup behavior across voltage and temperature. Unlike discrete bias networks, the monolithic Rbias exhibits matched TC and eliminates drift-induced frequency shifts or start-up failures common with external resistor/capacitor combinations.
Is external load capacitance still required when using the 74AUP1Z04GN,132?
Yes - external load capacitors C1 and C2 remain mandatory to set the crystal's load capacitance (CL) per manufacturer specification. The internal RPU and Rbias do not replace C1/C2; they only provide DC biasing and enable control. Typical values range from 6 pF to 22 pF each (series-equivalent), selected based on crystal CL, PCB stray capacitance (~1.5 pF), and desired frequency tolerance. Layout symmetry between C1 and C2 is critical for phase balance.
74AUP1Z04GN,132 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- *
- Package/Case:
- -
- Packaging:
- Bulk
- Product Status:
- Active
- Logic Type:
- -
- Supply Voltage:
- -
- Number of Bits:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
74AUP1Z04GN,132 FAQ
1.How can I place an order for 74AUP1Z04GN,132 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1Z04GN,132 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1Z04GN,132 reliable?
The price and inventory of 74AUP1Z04GN,132 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1Z04GN,132 is usually 5 days.
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4.How is shipping managed for 74AUP1Z04GN,132?
74AUP1Z04GN,132 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP1Z04GN,132 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP1Z04GN,132?
For technical support, including 74AUP1Z04GN,132 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1Z04GN,132 requirements.
6.How does Aetrix verify that 74AUP1Z04GN,132 is sourced from the original manufacturer or authorized distributors?
All 74AUP1Z04GN,132 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1Z04GN,132 meets industry standards.
7.What is the process for return or replacement of 74AUP1Z04GN,132?
All 74AUP1Z04GN,132 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1Z04GN,132, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1Z04GN,132 part is unused and in its original packaging.
Return procedure for 74AUP1Z04GN,132:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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