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Home > Products > Integrated Circuits (ICs) > Logic > Specialty Logic

Nexperia USA Inc. 74AUP1Z04GS,132

Name: 74AUP1Z04GS,132
Brand: Nexperia USA Inc.
SKU: 74AUP1Z04GS,132
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: 74AUP1Z04GS,132

Manufacturer:: Nexperia USA Inc.

Category:: Specialty Logic

Package:: 6-XFDFN

Datasheet:: 74AUP1Z04GS,132.pdf

Description:: IC XTAL DRIVER LP 6XSON

Quantity:: RFQ Add To RFQ list

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Product details

Overview

74AUP1Z04GS,132 from Nexperia is a low-power crystal oscillator driver IC with integrated enable input, internal bias resistor (R_bias ≈ 1.07–3.11 MΩ), and Schmitt-trigger EN input tolerant to slow edges across 0.8 V–3.6 V supply. It supports Pierce oscillator configurations for fundamental-mode quartz crystals, delivers dual buffered outputs (X2 and Y), and operates from –40 °C to +125 °C in ultra-compact XSON6 (SOT1202) package - used in battery-powered IoT sensor nodes requiring stable timing with minimal board area.

For engineers reviewing the 74AUP1Z04GS,132 datasheet, 74AUP1Z04GS,132 pinout, 74AUP1Z04GS,132 application, or 74AUP1Z04GS,132 equivalent, key selection criteria include its rail-to-rail compatible enable logic (active LOW), guaranteed propagation delay ≤3.8 ns (V_CC = 3.0–3.6 V, C_L = 10 pF), IOFF power-down leakage < ±0.75 µA, and built-in pull-up on X1 enabling low-power disable mode with X1 HIGH, X2 LOW, Y HIGH.

Technical Context

The 74AUP1Z04GS implements a CMOS inverter-based Pierce oscillator driver with two distinct output paths: X2 provides direct buffered inversion of X1 (typ. t_pd = 1.4–2.0 ns at V_CC ≥ 2.3 V), while Y delivers an additional buffered output with higher drive strength and longer propagation delay (t_pd = 1.4–4.5 ns). Its internal R_bias sets mid-supply DC bias on X1 to operate the inverter in high-gain linear region, ensuring reliable oscillation startup and amplitude stability.

Schmitt-trigger action on EN enables robust enable/disable control under noisy or slow-rising conditions; the IOFF circuitry isolates Y during power-down (V_CC = 0 V), limiting leakage to ±0.75 µA. The device complies with JEDEC standards JESD8-12 through JESD8C and supports dynamic power calculation via CPD = 24.9 pF (V_CC = 3.0–3.6 V), enabling accurate µW-level dissipation estimation in real-time clock subsystems.

Key Specifications

Parameter	Value and Actual Design Meaning
Supply Voltage	0.8 V to 3.6 V - supports single-cell Li-ion, coin-cell, and multi-rail embedded systems without level-shifting.
Propagation Delay (X1→X2)	≤2.0 ns at V_CC ≥ 2.3 V, C_L = 10 pF - ensures tight timing margins in high-frequency crystal reference generation.
Propagation Delay (X1→Y)	≤4.5 ns at V_CC ≥ 2.3 V, C_L = 10 pF - provides secondary buffered clock path with deterministic skew relative to X2.
IOFF Leakage Current	±0.75 µA at V_CC = 0 V - guarantees sub-µA system standby current when powered down.
Bias Resistance (R_bias)	1.07–3.11 MΩ - sets optimal DC operating point for crystal feedback loop stability across temperature and voltage.
Input Capacitance (X1)	1.5 pF - minimizes crystal load perturbation and simplifies matching network design for ±10 ppm accuracy.
Operating Temperature	–40 °C to +125 °C - qualified for automotive body electronics, industrial controllers, and extended-life portable devices.

Pinout & Package

XSON6 plastic extremely thin small outline package (SOT1202); no leads; 6 terminals; body dimensions 1.0 mm × 1.0 mm × 0.35 mm.

Pin/Terminal	Circuit Role	Design Meaning
1 (EN)	Enable input (active LOW)	Drives device into low-power disable mode; Schmitt trigger ensures noise immunity across full V_CC range.
2 (GND)	Ground reference	Common return for all signals and power; must be low-impedance for stable oscillator operation.
3 (X1)	Cry stal input / inverter input	Connects to one terminal of quartz crystal; internal R_bias biases node near V_CC/2 for linear gain region.
4 (X2)	Inverter output / crystal feedback	Drives crystal's second terminal; low-delay path optimized for Pierce oscillator loop closure.
5 (V_CC)	Positive supply	Accepts 0.8–3.6 V; decoupling capacitor required within 1 mm for low-noise clock generation.
6 (Y)	Secondary buffered output	Provides isolated clock signal with higher drive capability; remains functional during partial power-down.

Key Features

Feature	Design Value
Wide V_CC range (0.8–3.6 V)	Enables direct interface with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without external regulators.
Integrated R_bias (1.07–3.11 MΩ)	Eliminates external bias resistor, reducing BOM count and PCB footprint in crystal oscillator circuits.
IOFF power-down isolation	Prevents back-driving of Y output when V_CC is removed, protecting downstream logic in hot-swap or battery-disconnect scenarios.
Overvoltage-tolerant inputs (to 3.6 V)	Allows safe interfacing with 3.3 V control signals even when V_CC is 1.8 V, avoiding level shifters.
Low noise overshoot/undershoot (<10 % of V_CC)	Minimizes EMI in RF-sensitive applications such as BLE/Wi-Fi modules and medical telemetry transceivers.

Applications

Wearable Health Monitor

Automotive Body Control Module

Use Scenario: Ultra-low-power ECG sensor node sampling at 250 Hz with 10-year coin-cell lifetime.

IC Role / Device Role / Timing Role: Crystal driver generating precise 32.768 kHz RTC clock; EN pin synchronized to MCU sleep/wake cycles.

Use Value: 75 µA typical ICC in active mode and sub-µA IOFF leakage extend battery life beyond 10 years while maintaining ±20 ppm timekeeping accuracy.

Use Scenario: Door module controlling window lift, mirror fold, and interior lighting with CAN communication.

IC Role / Device Role / Timing Role: Primary 1 MHz system clock source for 8-bit microcontroller; X2 drives crystal, Y feeds watchdog timer.

Use Value: Guaranteed operation from –40 °C to +125 °C and latch-up immunity >100 mA ensure reliability in under-hood environments.

Industrial Wireless Sensor Node

Smart Home Hub Controller

Use Scenario: LoRaWAN temperature/humidity node deployed in unconditioned outdoor enclosures.

IC Role / Device Role / Timing Role: Low-jitter 4 MHz clock generator for ADC sampling and RF transceiver synchronization.

Use Value: Propagation delay variation <0.3 ns over temperature ensures consistent sampling phase alignment across –40 °C to +85 °C.

Use Scenario: Multi-protocol hub (Zigbee, Thread, Matter) requiring precise 32.768 kHz and 1 MHz clocks for concurrent radio stacks.

IC Role / Device Role / Timing Role: Dual-output crystal driver supplying independent clocks to Zigbee SoC (X2) and application processor (Y).

Use Value: Isolated Y output prevents cross-talk between radio domains; 1.0 mm × 1.0 mm XSON6 saves space in dense 4-layer PCB layouts.

Equivalent & Alternatives

The following parts are listed as comparable options for similar crystal driver applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
74AUP1Z04GM,115	Same die, XSON6 package (SOT886), larger body (1.0 × 1.45 × 0.5 mm)	Requires more PCB area; slightly higher thermal resistance (3.3 mW/K derating above 74 °C)	Select when board layout allows 0.45 mm extra length and thermal margin exceeds 74 °C ambient.
74LVC1G14GV,125	No internal R_bias or EN pin; standard Schmitt inverter only; requires external bias resistor and enable logic.	Higher BOM count and layout complexity; lacks IOFF isolation and guaranteed startup at low V_CC.	Choose only if cost sensitivity outweighs design simplicity and power optimization requirements.

Compared with 74AUP1Z04GM,115, the GS variant offers 0.35 mm height and 1.0 mm square footprint - critical for ultra-thin wearables; versus 74LVC1G14GV,125, it eliminates three external components (R_bias, pull-up, enable gate) and reduces standby current by >90 %.

Availability

74AUP1Z04GS,132 is available at Aetrix Electronics and suitable for wearable health monitors, automotive body control modules, industrial wireless sensor nodes, and smart home hub controllers requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for 74AUP1Z04GS,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance logic, analog, and MOSFET solutions for automotive, industrial, and consumer markets.

The 74AUP1Z04 belongs to Nexperia's Advanced Ultra-low Power (AUP) logic family, engineered specifically for energy-constrained timing applications where crystal oscillator stability, minimal footprint, and sub-µA power-down behavior are mandatory.

FAQ

What is the function of the EN pin, and how should it be driven?

The EN pin is an active-LOW enable input with Schmitt-trigger hysteresis. When pulled LOW, the device operates normally; when HIGH, it enters low-power disable mode with X1 pulled HIGH via internal R_PU, X2 forced LOW, and Y forced HIGH. Drive EN directly from a GPIO or open-drain controller output - no external pull-up required.

Can the 74AUP1Z04GS,132 drive a 32.768 kHz watch crystal?

Yes - the 74AUP1Z04GS,132 is explicitly designed for fundamental-mode quartz crystals including 32.768 kHz tuning-fork types. Its internal R_bias and low-input capacitance (1.5 pF) ensure reliable startup and stable oscillation with standard 12.5 pF load crystals, provided external load capacitors C1/C2 are selected per the crystal manufacturer's CL specification.

How does the IOFF feature protect downstream circuitry?

When V_CC = 0 V, the IOFF circuitry disables the Y output driver, limiting leakage current to ±0.75 µA regardless of voltage applied to Y or other pins. This prevents back-powering of powered-down subsystems - critical in battery-backed RTC designs where Y connects to a separate always-on domain.

What is the maximum recommended load capacitance for the Y output?

The Y output is characterized up to 30 pF load capacitance in datasheet Table 8. For reliable operation beyond 30 pF, verify signal integrity via oscilloscope measurement: ensure VOL ≤ 0.5 V and VOH ≥ V_CC – 0.5 V at target frequency and temperature, and confirm startup time remains within system requirements.

74AUP1Z04GS,132 Specifications

Product attributes: Attribute value

Manufacturer:: Nexperia USA Inc.

Series:: 74AUP

Package/Case:: 6-XFDFN

Packaging:: Tape & Reel (TR)

Product Status:: Active

Logic Type:: Inverter, X-Tal Driver

Supply Voltage:: 0.8V ~ 3.6V

Number of Bits:: -

Operating Temperature:: -40°C ~ 125°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 6-XSON, SOT1202 (1x1)

74AUP1Z04GS,132 FAQ

1.How can I place an order for 74AUP1Z04GS,132 through Aetrix?

Please submit a Request for Quotation (RFQ) for 74AUP1Z04GS,132 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 74AUP1Z04GS,132 reliable?

The price and inventory of 74AUP1Z04GS,132 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1Z04GS,132 is usually 5 days.

3.What payment methods are accepted for 74AUP1Z04GS,132?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP1Z04GS,132 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for 74AUP1Z04GS,132?

74AUP1Z04GS,132 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 74AUP1Z04GS,132 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 74AUP1Z04GS,132?

For technical support, including 74AUP1Z04GS,132 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1Z04GS,132 requirements.

6.How does Aetrix verify that 74AUP1Z04GS,132 is sourced from the original manufacturer or authorized distributors?

All 74AUP1Z04GS,132 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1Z04GS,132 meets industry standards.

7.What is the process for return or replacement of 74AUP1Z04GS,132?

All 74AUP1Z04GS,132 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1Z04GS,132, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 74AUP1Z04GS,132 part is unused and in its original packaging.

Return procedure for 74AUP1Z04GS,132:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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