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NXP Semiconductors 74AUP1Z125GM,115
- Part No.:
- 74AUP1Z125GM,115
- Manufacturer:
- NXP Semiconductors
- Category:
- Specialty Logic
- Package:
- -
- Datasheet:
-
74AUP1Z125GM,115.pdf
- Description:
- NEXPERIA 74AUP1Z125GM - BUS DRIV
- Quantity:
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Inventory:22,352
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Product details
Overview
74AUP1Z125GM,115 from Nexperia is a low-power crystal oscillator driver IC with integrated enable input, internal bias and pull-up resistors, and 3-state output. It operates across 0.8 V to 3.6 V supply, features Schmitt-trigger inputs for noise immunity, and delivers sub-5 ns propagation delay (X1→Y) at 3.3 V with 5 pF load. It enables ultra-low-power clock generation in space-constrained portable and battery-powered timing circuits.
For engineers reviewing the 74AUP1Z125GM,115 datasheet, 74AUP1Z125GM,115 pinout, 74AUP1Z125GM,115 application, or 74AUP1Z125GM,115 equivalent, key selection criteria include its 0.8–3.6 V wide-VCC operation, 75 µA max ICC at 125 °C, 3-state Y output with IOFF support, and XSON6 (SOT886) 1.0 × 1.45 × 0.5 mm package for high-density PCB layouts.
Technical Context
The 74AUP1Z125GM implements an inverting CMOS crystal driver with dual outputs: buffered Y (3-state) and unbuffered X2, plus dedicated X1 input and EN active-low enable. Its internal Rbias (~1.62 MΩ typical) and RPU establish stable DC biasing for Pierce oscillator configurations without external components.
Schmitt-trigger action on both EN and X1 ensures robust switching across full VCC range (0.8–3.6 V), while IOFF circuitry isolates Y during power-down. The device supports dynamic loading up to 30 pF and maintains stable oscillation across -40 °C to +125 °C ambient.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 0.8 V to 3.6 V - Enables direct interface with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters. |
| Max ICC (125 °C) | 75 µA - Ensures <100 µW static power at 3.3 V, critical for always-on real-time clock and wake-up timer circuits. |
| X1→Y Propagation Delay | 1.4–5.2 ns (VCC = 3.0–3.6 V, CL = 5 pF) - Supports >100 MHz fundamental crystal frequencies with margin for board trace delays. |
| Enable/Disable Time | 1.7–5.2 ns (VCC = 3.0–3.6 V, CL = 5 pF) - Allows rapid clock gating for dynamic power management in MCU sleep/wake transitions. |
| Input Capacitance (X1) | 1.5 pF - Minimizes crystal load perturbation, preserving frequency accuracy and reducing need for external trim caps. |
| Output Drive (Y) | ±4.0 mA (VOH/VOL @ 3.0 V) - Sufficient to drive downstream clock buffers or microcontroller clock inputs without fanout limitation. |
| Operating Temperature | -40 °C to +125 °C - Qualified for automotive body control modules, industrial sensors, and extended-range IoT edge nodes. |
Pinout & Package
XSON6 plastic extremely thin small outline package (SOT886); no leads; 6 terminals; body dimensions 1.0 mm × 1.45 mm × 0.5 mm; thermal pad optional; moisture sensitivity level MSL3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (EN) | Active-low enable input | Drives HIGH to disable: places Y in high-impedance OFF-state, pulls X1 HIGH via internal RPU, sets X2 LOW - achieves ultra-low standby current. |
| 2 (GND) | Ground reference | 0 V return path for all internal circuitry; must be low-inductance connection to minimize ground bounce in high-speed switching. |
| 3 (X1) | Inverting crystal input | Accepts feedback signal from crystal; Schmitt-trigger input ensures clean edge regeneration even with slow rise/fall times. |
| 4 (X2) | Unbuffered inverter output | Direct connection to crystal terminal; provides phase-inverted signal for Pierce topology; no series resistance required. |
| 5 (VCC) | Positive supply rail | Power source for all logic and analog bias functions; decoupling capacitor (100 nF) required within 2 mm of pin. |
| 6 (Y) | Buffered, 3-state output | Provides clean, isolated clock signal to system; enters high-Z when EN = HIGH - prevents bus contention in multi-source clock domains. |
Key Features
| Feature | Design Value |
|---|---|
| Wide VCC range (0.8–3.6 V) | Supports single-bom deployment across 1.2 V, 1.8 V, and 3.3 V SoC platforms without redesign. |
| Integrated Rbias and RPU | Eliminates two external resistors in Pierce oscillator design, reducing BOM count and layout area by ≥25 %. |
| IOFF partial power-down | Prevents back-drive current into Y when VCC = 0 V, enabling safe hot-plug or mixed-rail power sequencing. |
| ESD robustness (HBM 5 kV, CDM 1 kV) | Meets IEC 61000-4-2 Level 4 requirements without external protection, lowering system-level ESD design effort. |
| Low-noise overshoot/undershoot | <10 % of VCC - Reduces EMI emissions in EMC-sensitive applications like medical wearables and wireless sensor nodes. |
Applications
| Smart Wearable RTC | Automotive Body Controller |
|---|---|
|
Use Scenario: Real-time clock module in fitness tracker requiring continuous timekeeping during deep-sleep mode. IC Role / Device Role / Timing Role: Crystal driver generating 32.768 kHz clock for RTC oscillator; enabled only during time updates. Use Value: 75 µA max ICC at 125 °C extends battery life beyond 2 years; 3-state Y prevents leakage into sleeping MCU clock domain. |
Use Scenario: Door module microcontroller requiring precise wake-up timing after vehicle power-off. IC Role / Device Role / Timing Role: Low-voltage crystal oscillator driver powering wake-up timer circuit operating at 1.2 V. Use Value: 0.8 V minimum VCC allows operation directly from backup LDO; -40 °C to +125 °C rating ensures reliability in under-hood environments. |
| Industrial Sensor Node | IoT Edge Gateway |
|
Use Scenario: Battery-powered temperature sensor transmitting data every 10 minutes using ultra-low-power MCU. IC Role / Device Role / Timing Role: Clock source for MCU's low-power timer peripheral; disabled between measurement cycles. Use Value: Sub-5 ns enable time (<5.2 ns) guarantees fast clock stabilization before ADC sampling, minimizing wake-up latency. |
Use Scenario: Cellular-connected gateway synchronizing multiple subsystem clocks (Wi-Fi, BLE, LTE) to a common reference. IC Role / Device Role / Timing Role: Primary crystal driver feeding clock tree; Y output distributed to multiple clock buffers. Use Value: 1.7 pF Y output capacitance minimizes clock skew across fanout; 3-state capability enables dynamic clock isolation during firmware updates. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar crystal driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 74AUP1Z125GN,115 | Same die, smaller XSON6 package (0.9 × 1.0 × 0.35 mm, SOT1115); 1.5 pF lower CO (1.5 pF vs 1.7 pF). | Better suited for ultra-thin wearables where Z-height < 0.4 mm is mandatory; slightly reduced drive strength. | Select GN for maximum miniaturization; verify crystal start-up margin due to lower CO and tighter layout constraints. |
| 74AUP1Z125GS,115 | Same die, square XSON6 (1.0 × 1.0 × 0.35 mm, SOT1202); identical electrical specs but optimized for automated optical inspection (AOI) alignment. | Preferred for high-volume SMT lines requiring consistent fiducial visibility and placement repeatability. | Select GS when AOI yield or reflow consistency is prioritized over minimal footprint; no performance trade-off. |
Compared with GN and GS variants, the GM offers optimal balance of board area (1.45 mm length), thermal performance (3.3 mW/K derating above 74 °C), and manufacturability - making it the default choice for general-purpose low-power timing designs.
Availability
74AUP1Z125GM,115 is available at Aetrix Electronics and suitable for smart wearable RTC, automotive body controller, and industrial sensor node applications requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for 74AUP1Z125GM,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance, reliable, and energy-efficient components for automotive, industrial, computing, consumer, and communications markets.
The 74AUP1Z125 belongs to Nexperia's Advanced Ultra-low Power (AUP) logic family, engineered specifically for battery-operated and thermally constrained timing applications demanding sub-100 µA quiescent current and robust operation down to 0.8 V.
FAQ
What is the function of the internal Rbias resistor?
The internal Rbias (~1.62 MΩ typical) provides negative feedback between X2 and X1, establishing a stable DC bias point near mid-supply voltage. This forces the inverter into its high-gain linear region, enabling reliable crystal oscillation startup and sustained operation without external bias components.
Can the 74AUP1Z125GM drive crystals directly without external capacitors?
No - external load capacitors (C1 and C2) are required to set the crystal's load capacitance (CL) per manufacturer specification. The 74AUP1Z125GM provides internal Rbias and RPU but does not replace C1/C2; typical values range from 6 pF to 22 pF depending on crystal CL and board stray capacitance.
How does the 3-state Y output behave during enable deassertion?
When EN is driven HIGH, Y immediately enters high-impedance (Z) state with IOZ ≤ ±0.75 µA across -40 °C to +125 °C. Simultaneously, X1 is pulled HIGH via internal RPU and X2 is forced LOW, ensuring no unintended oscillation or signal contention on the crystal node.
Is the 74AUP1Z125GM compatible with 32.768 kHz tuning-fork crystals?
Yes - the device is explicitly characterized for low-frequency crystal operation. Its low input capacitance (1.5 pF), Schmitt-trigger input, and wide VCC range make it ideal for 32.768 kHz RTC crystals, supporting guaranteed startup at 0.8 V and operation up to +125 °C with minimal external components.
74AUP1Z125GM,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- *
- Package/Case:
- -
- Packaging:
- Bulk
- Product Status:
- Active
- Logic Type:
- -
- Supply Voltage:
- -
- Number of Bits:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
74AUP1Z125GM,115 FAQ
1.How can I place an order for 74AUP1Z125GM,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1Z125GM,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1Z125GM,115 reliable?
The price and inventory of 74AUP1Z125GM,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1Z125GM,115 is usually 5 days.
3.What payment methods are accepted for 74AUP1Z125GM,115?
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4.How is shipping managed for 74AUP1Z125GM,115?
74AUP1Z125GM,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP1Z125GM,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP1Z125GM,115?
For technical support, including 74AUP1Z125GM,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1Z125GM,115 requirements.
6.How does Aetrix verify that 74AUP1Z125GM,115 is sourced from the original manufacturer or authorized distributors?
All 74AUP1Z125GM,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1Z125GM,115 meets industry standards.
7.What is the process for return or replacement of 74AUP1Z125GM,115?
All 74AUP1Z125GM,115 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1Z125GM,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1Z125GM,115 part is unused and in its original packaging.
Return procedure for 74AUP1Z125GM,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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