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NXP Semiconductors 74AUP2G02GD,125
- Part No.:
- 74AUP2G02GD,125
- Manufacturer:
- NXP Semiconductors
- Category:
- Gates and Inverters
- Package:
- 8-XFDFN
- Datasheet:
-
74AUP2G02GD,125.pdf
- Description:
- IC GATE NOR 2CH 2-INP 8-XSON
- Quantity:
- Payment:
- Shipping:
Inventory:98,275
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Product details
Overview
74AUP2G02GD,125 from Nexperia is a low-power dual 2-input NOR gate with Schmitt-trigger inputs, operating across 0.8 V to 3.6 V supply, delivering ICC ≤ 0.9 μA max static current and propagation delay as low as 0.8 ns at 3.0 V (CL = 5 pF), used in voltage-level translation and noise-immune logic interfacing in portable sensor nodes and battery-powered microcontroller I/O expansion.
For engineers reviewing the 74AUP2G02GD,125 datasheet, 74AUP2G02GD,125 pinout, 74AUP2G02GD,125 application, or 74AUP2G02GD,125 equivalent, this device is selected for ultra-low-power digital signal conditioning where partial power-down (IOFF) and wide-VCC tolerance are mandatory - especially in space-constrained industrial IoT edge nodes requiring robust input rise/fall time immunity.
Technical Context
This device implements two independent NOR gates with Schmitt-trigger input thresholds (VIH ≥ 0.65VCC, VIL ≤ 0.35VCC at 1.4 V ≤ VCC ≤ 1.95 V), enabling reliable operation with slow-rising signals common in RC-debounced switches or analog-sensor-derived logic edges. Each gate features symmetric push-pull CMOS output stages rated for ±4 mA drive at 3.0 V.
The IOFF circuit actively disables outputs when VCC = 0 V, limiting backflow current to ±0.75 μA max, making it suitable for live-insertion and multi-rail partial-power-down systems. Input tolerance up to 3.6 V allows interfacing with higher-voltage peripherals while powered from sub-1 V rails.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 0.8 V to 3.6 V - supports direct interface with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters |
| Max Static Supply Current | 0.9 μA at VCC = 0.8–3.6 V - enables multi-year battery life in always-on wake-up logic paths |
| Propagation Delay | 0.8 ns typical at VCC = 3.0 V, CL = 5 pF - sufficient for <1 GHz toggle rates in high-speed control sequencing |
| IOFF Leakage | ±0.75 μA max at VCC = 0 V - prevents destructive back-current during hot-swap or rail sequencing |
| Input Voltage Tolerance | Up to 3.6 V independent of VCC - permits safe connection to 3.3 V GPIOs even when powered from 1.2 V |
| Operating Temperature | −40 °C to +125 °C - qualified for under-hood automotive modules and industrial motor drives |
| ESD Robustness | HBM >5000 V, CDM >1000 V - withstands handling and board-level ESD events without protection diodes |
Pinout & Package
XSON8 package (SOT996-2): plastic extremely thin small outline, no leads, 8-terminal, body size 1.35 × 1.0 × 0.35 mm - optimized for 0.4 mm pitch PCB layouts in wearables and medical patches.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1A, 2A | Data Input A for Gate 1 and Gate 2 | Accepts 0.8–3.6 V logic; Schmitt-trigger threshold rejects noise below 30% VCC hysteresis |
| 1B, 2B | Data Input B for Gate 1 and Gate 2 | Independent inputs per gate; no internal coupling - supports asynchronous dual-channel control |
| 1Y, 2Y | Data Output Y for Gate 1 and Gate 2 | CMOS push-pull; drives loads up to 4 mA while maintaining VOL ≤ 0.5 V at 3.0 V |
| VCC | Positive Supply Terminal | Single rail powers both gates; IOFF activates automatically when pulled to 0 V |
| GND | Ground Reference | Common return for all inputs, outputs, and internal biasing; decoupling required within 2 mm |
Key Features
| Feature | Design Value |
|---|---|
| Wide VCC operation | 0.8 V to 3.6 V enables single-supply compatibility across legacy and next-gen low-voltage SoCs |
| Schmitt-trigger inputs | Input hysteresis ≥ 0.3 V at 1.8 V ensures clean switching despite slow or noisy signal edges |
| IOFF partial power-down | Outputs go high-impedance when VCC = 0 V, eliminating backfeed in multi-rail hot-swap systems |
| High noise immunity | Input noise margin ≥ 40% VCC at mid-rail ensures reliable operation in EMI-heavy motor-control environments |
| Ultra-low ICC | 0.9 μA max ICC allows integration into always-on wake logic without measurable battery drain |
Applications
| Industrial Sensor Interface | Portable Medical Device Logic |
|---|---|
Use Scenario: Debouncing mechanical switch inputs on a factory-floor pressure sensor node with RC-filtered lines. IC Role / Device Role / Timing Role: Dual NOR gate performs active-low OR logic and provides Schmitt-triggered signal conditioning before MCU GPIO capture. Use Value: Eliminates need for external RC + comparator; reduces BOM count by one IC and saves 2.5 mm² PCB area. | Use Scenario: Enabling/disabling LED indicators and buzzer drivers in a battery-powered pulse oximeter. IC Role / Device Role / Timing Role: NOR gate implements enable-inversion logic for low-active peripherals while powered from 1.2 V LDO. Use Value: Achieves 0.9 μA quiescent current in standby - extends coin-cell life beyond 3 years. |
| Automotive Body Control Module | IoT Edge Node Power Sequencing |
Use Scenario: Interfacing 3.3 V door-lock actuator status signals to a 1.2 V microcontroller in a BCM. IC Role / Device Role / Timing Role: Level-translating NOR gate accepts 3.3 V inputs while powered from 1.2 V rail, with IOFF protecting during sleep mode. Use Value: Avoids dedicated level shifter IC; maintains signal integrity without pull-up resistors or timing skew. | Use Scenario: Controlling power-enable sequencing between RF module and host MCU in a LoRaWAN sensor endpoint. IC Role / Device Role / Timing Role: Dual gate coordinates delayed enable/disable handshaking using cross-coupled feedback and reset timing. Use Value: Reduces sequencing complexity vs. discrete MOSFET + RC solutions; improves startup repeatability across temperature. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual NOR gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC2G02DPWR | Higher ICC (max 10 μA), no Schmitt-trigger inputs, VCC min = 1.65 V | Lacks noise immunity on slow edges; unsuitable for RC-debounced switches or low-VCC (<1.2 V) systems | Select only if operating strictly at 1.8 V+ and signal edges are fast/clean |
| 74LVC2G02GM,132 | Same XSON8 footprint but rated −40 °C to +85 °C only; IOFF not specified | Not qualified for extended temperature automotive or industrial use; no guaranteed power-down isolation | Use only in commercial-grade consumer devices with ambient-limited thermal profiles |
Compared with SN74LVC2G02DPWR and 74LVC2G02GM,132, the 74AUP2G02GD,125 uniquely combines sub-1 V operation, Schmitt-trigger noise rejection, and guaranteed IOFF - making it the sole choice for ultra-low-power, mixed-voltage, and thermally demanding embedded logic.
Availability
74AUP2G02GD,125 is available at Aetrix Electronics and suitable for industrial sensor interfaces, portable medical devices, automotive body control modules, and IoT edge node power sequencing requiring stable component supply across extended temperature and ultra-low-power constraints.
Supply support for 74AUP2G02GD,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on essential efficiency technologies - delivering high-performance, reliable, and scalable logic, power, and analog components for automotive, industrial, and mobile markets.
The 74AUP (Advanced Ultra-low Power) product line targets battery-operated and energy-sensitive applications, emphasizing minimal static/dynamic power, wide supply flexibility, and robust signal integrity in compact packages.
FAQ
Does 74AUP2G02GD,125 support true bidirectional level shifting?
No. It is a unidirectional logic gate: inputs accept up to 3.6 V regardless of VCC, but outputs swing only between GND and the applied VCC. For bidirectional translation (e.g., I²C), a dedicated level shifter like NXH0102 must be used instead.
Can the Schmitt-trigger inputs be disabled or bypassed?
No. Schmitt-trigger action is inherent to the input structure and cannot be disabled. It is always active, providing fixed hysteresis (typically 0.3–0.5 V depending on VCC) - beneficial for noisy environments but may cause unintended toggling if input transitions near threshold without sufficient slew rate.
What is the maximum capacitive load the outputs can drive reliably?
The outputs are characterized up to 30 pF load capacitance with guaranteed timing (tpd ≤ 8.5 ns at VCC = 3.0 V). Driving >30 pF may increase propagation delay nonlinearly and risk overshoot/undershoot exceeding 10% of VCC; add series termination or buffer stages for heavier loads.
Is 74AUP2G02GD,125 pin-compatible with other 74AUP2Gxx variants in XSON8?
Yes - all 74AUP2Gxx devices in SOT996-2 (XSON8) share identical 8-pin mapping: pins 1/2 = inputs A/B of Gate 1, pin 3 = output Y1, pins 4/5 = inputs A/B of Gate 2, pin 6 = output Y2, pin 7 = GND, pin 8 = VCC. This enables drop-in replacement across NOR, NAND, AND, OR, and inverter variants.
74AUP2G02GD,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- 74AUP
- Package/Case:
- 8-XFDFN
- Packaging:
- Bulk
- Product Status:
- Active
- Logic Type:
- NOR Gate
- Number of Circuits:
- 2
- Number of Inputs:
- 2
- Features:
- -
- Voltage - Supply:
- 0.8V ~ 3.6V
- Current - Quiescent (Max):
- 500 nA
- Current - Output High, Low:
- 4mA, 4mA
- Input Logic Level - Low:
- 0.7V ~ 0.9V
- Input Logic Level - High:
- 1.6V ~ 2V
- Max Propagation Delay @ V, Max CL:
- 6.4ns @ 3.3V, 30pF
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-XSON (2x3)
74AUP2G02GD,125 FAQ
1.How can I place an order for 74AUP2G02GD,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP2G02GD,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP2G02GD,125 reliable?
The price and inventory of 74AUP2G02GD,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP2G02GD,125 is usually 5 days.
3.What payment methods are accepted for 74AUP2G02GD,125?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP2G02GD,125 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP2G02GD,125?
74AUP2G02GD,125 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP2G02GD,125 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP2G02GD,125?
For technical support, including 74AUP2G02GD,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP2G02GD,125 requirements.
6.How does Aetrix verify that 74AUP2G02GD,125 is sourced from the original manufacturer or authorized distributors?
All 74AUP2G02GD,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP2G02GD,125 meets industry standards.
7.What is the process for return or replacement of 74AUP2G02GD,125?
All 74AUP2G02GD,125 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP2G02GD,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP2G02GD,125 part is unused and in its original packaging.
Return procedure for 74AUP2G02GD,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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