Nexperia USA Inc. 74AUP2G02GN,115

Overview

74AUP2G02GN,115 from Nexperia is a low-power dual 2-input NOR gate in an XSON8 package (SOT1116), operating from 0.8 V to 3.6 V supply, featuring Schmitt-trigger inputs for noise immunity and IOFF circuitry enabling partial power-down mode. It delivers propagation delays as low as 0.8 ns at 3.0–3.6 V with 5 pF load and draws ≤1.4 μA ICC across –40 °C to +125 °C - used in battery-powered sensor interface logic and voltage-level translation in portable IoT nodes.

For engineers reviewing the 74AUP2G02GN,115 datasheet, 74AUP2G02GN,115 pinout, 74AUP2G02GN,115 application, or 74AUP2G02GN,115 equivalent, key selection criteria include its ultra-low static current, guaranteed operation down to 0.8 V, IOFF-enabled bus isolation during power sequencing, and Schmitt-trigger input hysteresis for robust signal conditioning in noisy mixed-voltage systems.

Technical Context

This device implements two independent 2-input NOR gates with Schmitt-trigger inputs on all four inputs (1A/1B/2A/2B), providing hysteresis to tolerate slow-rising signals and suppress noise-induced glitches. Each output (1Y/2Y) drives rail-to-rail CMOS-compatible levels with defined VOH/VOL under load up to ±4 mA.

The IOFF feature actively disables outputs when VCC = 0 V, limiting backflow current to ±0.75 μA even when inputs/outputs are biased to 3.6 V - critical for hot-swap and multi-rail power domain isolation. It complies with JEDEC standards JESD8-12 through JESD8-B across its full voltage range.

Key Specifications

Pinout & Package

XSON8 package (SOT1116): extremely thin small outline, no leads, 8-terminal surface-mount, body dimensions 1.2 × 1.0 × 0.35 mm, wettable flank compatible, pin 1 index located below marking "pB" in lower-left corner.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual 2-input NOR gate applications.

Compared with SN74LVC2G02DBVR and 74LVC2G02GM,132, the 74AUP2G02GN,115 uniquely combines sub-μA static current, Schmitt-trigger inputs, and IOFF in a 1.2 mm × 1.0 mm XSON8 package - making it the sole option for ultra-low-power, mixed-voltage, and hot-pluggable logic interfacing.

Availability

74AUP2G02GN,115 is available at Aetrix Electronics and suitable for industrial sensor interface, portable device power sequencing, low-power wearable control logic, and automotive body control module applications requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for 74AUP2G02GN,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert delivering high-performance logic, discrete, and MOSFET solutions optimized for efficiency, reliability, and miniaturization in high-volume electronics.

The 74AUP (Advanced Ultra-low Power) product line targets battery-operated and energy-sensitive applications, emphasizing sub-μA static current, wide-VCC operation, and robust IO features like IOFF and Schmitt triggers - specifically engineered for portable, industrial, and automotive edge nodes.

FAQ

Does 74AUP2G02GN,115 support true bidirectional signal routing?

No. The 74AUP2G02GN,115 is a unidirectional logic gate with dedicated inputs (1A/1B/2A/2B) and outputs (1Y/2Y). It lacks internal bus-switch architecture or direction-control pins. Its IOFF feature only disables outputs during power-down - it does not enable data flow from output to input.

Can 74AUP2G02GN,115 be used with 0.8 V microcontroller I/O without level shifters?

Yes. The device is fully specified down to 0.8 V VCC and accepts input voltages up to 3.6 V regardless of supply level. At 0.8 V operation, VIH is 0.75×VCC (≥0.6 V) and VIL is ≤0.25×VCC (≤0.2 V), matching standard 0.8 V logic thresholds - enabling direct connection to sub-1 V ASICs and ultra-low-power MCUs.

What is the thermal derating behavior for SOT1116 package at elevated temperatures?

The SOT1116 (XSON8) package has a total power dissipation derating slope of 4.2 mW/K above +90 °C. At +125 °C ambient, Ptot is reduced by (125 − 90) × 4.2 = 147 mW from its 250 mW rating, yielding ~103 mW maximum continuous dissipation - sufficient for typical logic switching at <1 MHz with minimal self-heating.

How does the Schmitt-trigger input hysteresis improve system reliability in automotive environments?

Schmitt-trigger inputs provide 100–200 mV hysteresis depending on VCC, rejecting common-mode noise, ground bounce, and EMI-induced transients on long traces or unshielded harnesses. In automotive body control modules, this eliminates false triggering from ignition noise or alternator ripple without adding external RC filters or comparators.