NXP Semiconductors 74AUP2G04GM125

Overview

74AUP2G04GM125 from NXP Semiconductors is a low-power dual inverter IC with Schmitt-trigger inputs, operating across 0.8 V to 3.6 V supply voltage, delivering ultra-low static current (≤0.9 µA max), propagation delay as low as 1.0 ns at 3.0–3.6 V (CL = 5 pF), and IOFF-enabled partial power-down protection. It serves as a signal-level logic inverter pair in space-constrained battery-powered sensor interfaces and portable MCU peripheral conditioning circuits.

For engineers reviewing the 74AUP2G04GM125 datasheet, 74AUP2G04GM125 pinout, 74AUP2G04GM125 application, or 74AUP2G04GM125 equivalent, key selection criteria include its 0.8–3.6 V wide-VCC compatibility, guaranteed operation up to +125 °C, IOFF circuitry for backflow prevention during power sequencing, and XSON6 (SOT886) 1.0 × 1.45 × 0.5 mm package with 6-terminal no-lead construction.

Technical Context

The 74AUP2G04GM125 implements two independent CMOS inverter stages, each featuring Schmitt-trigger input thresholds that tolerate slow-rising/falling signals across its full 0.8–3.6 V VCC range. Its IOFF functionality actively disables outputs when VCC = 0 V, blocking damaging current flow between powered and unpowered system domains.

Static and dynamic power consumption are minimized via optimized transistor sizing and process technology: ICC ≤ 0.9 µA (max) at 25 °C, CPD ≤ 4.0 pF (at 3.0–3.6 V), and propagation delays tightly specified from 1.0 ns (VCC = 3.0–3.6 V, CL = 5 pF) to 16.0 ns (VCC = 0.8 V, CL = 5 pF).

Key Specifications

Pinout & Package

XSON6 plastic extremely thin small outline package (SOT886); no leads; 6 terminals; body dimensions 1.0 mm × 1.45 mm × 0.5 mm; pin 1 indicator located on lower-left corner below marking code 'p4'.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual inverter applications.

Compared with SN74LVC2G04DSFR and 74AUP2G04GW,125, the 74AUP2G04GM125 uniquely combines ultra-low ICC (≤0.9 µA), IOFF protection, and the smallest footprint (1.0 × 1.45 mm), making it optimal for miniaturized, battery-sensitive designs requiring robust power sequencing.

Availability

74AUP2G04GM125 is available at Aetrix Electronics and suitable for industrial sensor interfaces, portable MCU peripheral conditioning, and automotive body control modules requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for 74AUP2G04GM125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT applications.

The 74AUP2G04GM125 belongs to NXP's Advanced Ultra-low Power (AUP) logic family, engineered specifically for energy-constrained portable and embedded systems demanding sub-1-µA static current and robust operation across wide voltage and temperature ranges.

FAQ

What is the maximum supply voltage rating for the 74AUP2G04GM125?

The absolute maximum supply voltage (VCC) for the 74AUP2G04GM125 is +4.6 V, per its limiting values table. However, recommended operation is strictly 0.8 V to 3.6 V. Exceeding 3.6 V during normal use risks violating logic thresholds and accelerating parametric drift, even if within absolute maximum ratings. The 74AUP2G04GM125 must not be operated above 3.6 V in production systems.

Does the 74AUP2G04GM125 support true bidirectional signal translation?

No, the 74AUP2G04GM125 is a unidirectional dual inverter only - it does not provide level translation or bidirectional bus switching. Each channel (1A→1Y, 2A→2Y) operates independently with fixed input-to-output inversion. For bidirectional voltage translation, a dedicated bus transceiver such as the TXB0104 would be required instead of the 74AUP2G04GM125.

How does the IOFF feature behave when VCC is ramping down during power sequencing?

The IOFF circuitry in the 74AUP2G04GM125 activates automatically when VCC falls below approximately 0.2 V, disabling both outputs and limiting power-off leakage to ±0.75 µA. This prevents back-current flow from live signal lines into the unpowered device, protecting upstream drivers and ensuring clean power-state transitions in multi-rail systems using the 74AUP2G04GM125.

Can the 74AUP2G04GM125 drive a 15 pF capacitive load at 3.3 V with guaranteed timing?

Yes - at VCC = 3.0–3.6 V and CL = 15 pF, the 74AUP2G04GM125 guarantees tPD ≤ 5.5 ns (max) over −40 °C to +125 °C. Measured typical delay is 3.1 ns. This meets timing requirements for driving moderate-speed digital loads like FPGA configuration pins or short PCB traces, confirming the 74AUP2G04GM125 is fully characterized for this condition.

Is the 74AUP2G04GM125 qualified for automotive applications?

The 74AUP2G04GM125 is rated for −40 °C to +125 °C operation and complies with AEC-Q100 stress testing for temperature cycling and HTOL, but NXP does not designate it as "automotive qualified" in official documentation. It may be used in non-safety-critical automotive body electronics with customer validation; however, for ASIL-B/C systems, an explicitly automotive-qualified part such as the 74AUP2G04GM,125 (AEC-Q100 Grade 1) should be selected instead of the 74AUP2G04GM125.