NXP Semiconductors 74AUP2G0604GMH

Overview

74AUP2G0604 from Nexperia is a dual-function low-power logic IC containing one inverting buffer with open-drain output (1A→1Y) and one standard inverter (2A→2Y), operating across 0.8 V to 3.6 V supply. It features Schmitt-trigger inputs for noise immunity, IOFF partial power-down protection, and dual outputs optimized for level-shifting and wired-OR bus interfacing in portable sensor nodes and I²C-compatible systems.

For engineers reviewing the 74AUP2G0604 datasheet, 74AUP2G0604 pinout, 74AUP2G0604 application, or 74AUP2G0604 equivalent, key selection criteria include its dual-output topology (open-drain + push-pull), guaranteed operation down to 0.8 V, sub-1 μA ICC max at 25 °C, and validated −40 °C to +125 °C temperature range - critical for battery-powered industrial controllers and automotive body electronics.

Technical Context

This device integrates two independent logic functions in a single 6-pin package: the 1Y output implements an open-drain inverting buffer with programmable pull-up compatibility, while 2Y delivers a standard CMOS inverter with rail-to-rail output swing. Both inputs incorporate Schmitt-trigger thresholds scaled to VCC (e.g., VIH = 0.65×VCC min at 1.4 V), enabling robust signal conditioning of slow-rising analog or noisy digital signals.

The IOFF circuit actively disables both outputs when VCC = 0 V, limiting backflow current to ±0.75 μA max over −40 °C to +125 °C, satisfying JEDEC JESD78 Class II latch-up requirements (>100 mA). Propagation delays are load- and voltage-dependent: tPD = 1.1 ns (typ) at VCC = 3.3 V/CL = 5 pF for 2A→2Y, and 1.2 ns (typ) for 1A→1Y under identical conditions.

Key Specifications

Pinout & Package

74AUP2G0604 is available in four 6-terminal packages: TSSOP6 (SOT363-2), XSON6 (SOT886, SOT1115, SOT1202), all with identical pin mapping and thermal performance derating profiles. The XSON6 variants offer footprint scalability (0.9×1.0 mm to 1.0×1.45 mm) for space-constrained wearables and IoT edge nodes.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-buffer/inverter applications.

Compared with SN74LVC2G06DSFR and 74LVC2G14GW, the 74AUP2G0604 uniquely combines open-drain and push-pull outputs in one package with sub-1 V operation - eliminating board space and power overhead required by dual-IC solutions in ultra-low-voltage systems.

Availability

74AUP2G0604 is available at Aetrix Electronics and suitable for industrial sensor interfaces, I²C bus extenders, portable medical wearables, and automotive body control modules requiring stable component supply across extended temperature ranges and ultra-low power envelopes.

Supply support for 74AUP2G0604 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, analog, and MOSFET solutions for automotive, industrial, and consumer markets.

The 74AUP (Advanced Ultra-low Power) product line targets battery-powered and energy-constrained applications requiring sub-1 μA static current, wide VCC range, and robust IOFF behavior - specifically engineered for always-on sensing and IoT edge nodes.

FAQ

Can 74AUP2G0604 operate with a 0.8 V supply while maintaining full logic functionality?

Yes. The device is fully specified from 0.8 V to 3.6 V, with verified VIH/VIL thresholds (e.g., VIH ≥ 0.75×VCC at 125 °C), propagation delay (14.4 ns max at 0.8 V/5 pF), and IOFF activation - confirmed across −40 °C to +125 °C per datasheet Table 7 and Table 8.

What is the maximum sink current capability of the 1Y open-drain output?

The 1Y output is rated for 20 mA sink current at VCC = 3.0 V, with VOL ≤ 0.50 V (max) over −40 °C to +125 °C. This enables direct driving of LEDs, relays, or low-impedance pull-ups in I²C/SMBus applications without external transistors.

How does the IOFF feature protect the device during partial power-down?

When VCC = 0 V, the IOFF circuit disables both outputs, limiting backflow current to ±0.75 μA max. This prevents damage from signals applied to 1A, 2A, 1Y, or 2Y while the IC is unpowered - a requirement for hot-pluggable modules and modular power architectures.

Is the 74AUP2G0604 pin-compatible with other 6-pin AUP-series logic devices?

No. While it shares the 6-pin XSON6/TSSOP6 footprint with other AUP dual-gate devices, its pinout (1A-GND-2A-2Y-VCC-1Y) is unique to the 74AUP2G0604 function set. Substitution requires verification of signal routing and output type (open-drain vs. push-pull) per application.