NXP Semiconductors 74AUP2G06GM,115

Overview

74AUP2G06GM,115 from Nexperia is a low-power dual inverter IC with open-drain outputs, designed for level-shifting and wired-OR logic implementation in ultra-low-voltage systems. It operates across 0.8 V to 3.6 V supply, features Schmitt-trigger inputs for noise immunity, delivers ≤1.4 μA max ICC at −40 °C to +125 °C, and supports partial power-down via IOFF circuitry - used in battery-powered sensor interfaces and I²C bus voltage translation.

For engineers reviewing the 74AUP2G06GM,115 datasheet, 74AUP2G06GM,115 pinout, 74AUP2G06GM,115 application, or 74AUP2G06GM,115 equivalent, this device is selected for its sub-1-μA static current, rail-to-rail input tolerance up to 3.6 V, guaranteed operation at 125 °C ambient, and compatibility with mixed-voltage digital interconnects requiring active-Low wired-OR functionality.

Technical Context

This dual inverter implements two independent open-drain inverters with Schmitt-trigger inputs, enabling robust signal conditioning of slow-rising or noisy digital signals across the full 0.8–3.6 V VCC range. Each channel accepts input voltages up to 3.6 V regardless of supply level, supporting level translation between disparate logic families.

The IOFF circuit actively disables output terminals when VCC = 0 V, blocking backflow current during partial system power-down - critical for hot-swap and multi-rail power sequencing. Propagation delay ranges from 0.8 ns (VCC = 3.3 V, CL = 5 pF) to 11.9 ns (VCC = 3.3 V, CL = 30 pF), with CPD fixed at 1.2 pF for dynamic power estimation.

Key Specifications

Pinout & Package

XSON6 package (SOT886): plastic extremely thin small outline, no leads, 6-terminal surface-mount package measuring 1.0 mm × 1.45 mm × 0.5 mm - optimized for space-constrained portable electronics and high-density PCB layouts.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual inverter with open-drain output applications.

Compared with SN74LVC2G06DCUR and 74LVC2G06GW,115, the 74AUP2G06GM,115 uniquely combines sub-1-μA static current, 0.8 V operation, IOFF, and Schmitt inputs - making it the only option for energy-critical, mixed-voltage, and hot-swap-sensitive designs.

Availability

74AUP2G06GM,115 is available at Aetrix Electronics and suitable for industrial sensor hubs, battery-powered wearables, automotive body control modules, and I²C bus level translation requiring stable component supply across extended temperature and ultra-low-power conditions.

Supply support for 74AUP2G06GM,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, discrete, and MOSFET solutions - delivering performance-per-watt leadership for consumer, industrial, and automotive markets.

The 74AUP (Advanced Ultra-low Power) product line targets ultra-low-power digital interfacing, emphasizing sub-1-μA static current, wide VCC range, and robustness in thermally constrained and battery-operated systems.

FAQ

Can 74AUP2G06GM,115 drive a 10 kΩ pull-up to 5 V?

No. Although inputs tolerate up to 3.6 V, the open-drain output is rated for VO(max) = 4.6 V absolute maximum and intended for pull-ups ≤ VCC + 0.3 V. Driving a 5 V pull-up risks exceeding output voltage limits and degrading reliability. Use only pull-ups referenced to VCC or lower-voltage rails.

Does the IOFF feature work when VCC is floating?

No. IOFF activation requires VCC = 0 V (solidly grounded). A floating VCC may leave IOFF inactive, permitting back-current. System design must ensure VCC is actively discharged or clamped to 0 V during power-down sequences to guarantee IOFF engagement.

What is the minimum recommended pull-up resistor for 1Y/2Y at 3.3 V VCC?

Minimum pull-up is determined by VOL ≤ 0.5 V at IO = 4 mA (per datasheet Table 7). At 3.3 V, RPU(min) = (3.3 V − 0.5 V) / 4 mA = 700 Ω. For reliable noise margin and rise time, use 2.2 kΩ–10 kΩ unless faster edges are required.

Is 74AUP2G06GM,115 qualified for automotive AEC-Q100?

No. This device is specified for −40 °C to +125 °C operation but is not AEC-Q100 qualified. Nexperia offers automotive-qualified equivalents (e.g., 74AUP2G06GM-Q100) with additional stress testing and PPAP documentation - required for safety-critical vehicle subsystems.