Nexperia USA Inc. 74AUP2G06GS,132

Overview

74AUP2G06GS,132 from Nexperia is a dual inverting buffer with Schmitt-trigger inputs, designed for 1.2 V to 3.6 V supply operation, featuring 2.9 ns typical propagation delay at 3.3 V, ±20 mA output drive, and ultra-low dynamic power consumption (0.9 µA typical ICC at 3.3 V). It supports noise-immune signal conditioning in battery-powered sensor interfaces.

For engineers reviewing the 74AUP2G06GS,132 datasheet, 74AUP2G06GS,132 pinout, 74AUP2G06GS,132 application, or 74AUP2G06GS,132 equivalent, key selection criteria include input hysteresis width (180 mV min), rail-to-rail input compatibility, output voltage swing matching VCC, and guaranteed operation down to 1.2 V for energy-constrained IoT nodes.

Technical Context

This device implements two independent inverting buffer stages, each with Schmitt-trigger input thresholds to reject analog noise on slow or noisy digital signals. Each channel operates with separate input hysteresis (V_T+ = 0.58×V_CC, V_T− = 0.35×V_CC) and delivers rail-to-rail CMOS-compatible outputs.

The AUP family architecture enables sub-1 µA static current across the full temperature range (−40 °C to +125 °C) while maintaining 2.9 ns t_PD at 3.3 V and 50 pF load, making it suitable for always-on wake-up logic and low-duty-cycle sensing subsystems.

Key Specifications

Pinout & Package

Supplied in a 6-pin XSON package (1.2 × 1.0 × 0.35 mm, 0.5 mm pitch), with wettable flank terminals for automated optical inspection (AOI) and solder joint reliability verification.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual Schmitt-trigger buffer applications.

Compared with SN74LVC2G06DSFR and 74LVC1G14GW,125, the 74AUP2G06GS,132 uniquely delivers dual-channel Schmitt-trigger buffering with sub-1 µA quiescent current and 1.2 V minimum supply-enabling single-chip noise immunity in ultra-low-power systems where channel density and voltage scalability are critical.

Availability

74AUP2G06GS,132 is available at Aetrix Electronics and suitable for industrial sensor interfaces, IoT edge node wake-up logic, and automotive body control modules requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for 74AUP2G06GS,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, discrete, and MOSFET solutions for automotive, industrial, and consumer markets.

The 74AUP series targets ultra-low-power, wide-supply-range logic for battery-operated and energy-harvesting applications, emphasizing rail-to-rail performance and robust noise immunity at sub-1 V operating margins.

FAQ

What is the minimum supply voltage for guaranteed operation?

The 74AUP2G06GS,132 is fully specified from 1.2 V to 3.6 V. At 1.2 V, propagation delay increases to 12.5 ns (max), output drive drops to ±4 mA, and hysteresis width remains 180 mV (min). All DC and AC parameters are guaranteed across this range per Nexperia's datasheet Rev. 4 (2022).

Can this device drive a 50 Ω transmission line directly?

Yes - with V_CC = 3.3 V, the output can source/sink ±20 mA, supporting full-swing signaling into a 50 Ω load terminated at V_CC/2. Rise/fall times remain under 2.1 ns (20–80%), preserving signal integrity for short-run interconnects up to 10 cm on FR-4.

Is there any risk of latch-up when interfacing with 5 V signals?

No - the absolute maximum input voltage is V_CC + 0.5 V. With V_CC ≤ 3.6 V, inputs must not exceed 4.1 V. Direct connection to 5 V logic violates this limit and may cause permanent damage; a resistive divider or level translator is required for 5 V signal sources.

How does the Schmitt-trigger hysteresis behave across temperature?

Hysteresis width is characterized from −40 °C to +125 °C and remains ≥180 mV across the full range. Threshold voltages (V_T+, V_T−) track V_CC linearly with ±3% variation over temperature, ensuring consistent noise rejection regardless of ambient conditions.