Diodes Incorporated 74AUP2G07FZ4-7
- Part No.:
- 74AUP2G07FZ4-7
- Manufacturer:
- Diodes Incorporated
- Package:
- 6-XFDFN
- Datasheet:
-
74AUP2G07FZ4-7.pdf
- Description:
- IC BUFFER NON-INVERT 3.6V 6DFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
74AUP2G07FZ4-7 from Diodes Incorporated is a dual non-inverting buffer with open-drain outputs, designed for level-shifting and wired-OR logic in ultra-low-power portable systems. It operates across 0.8V–3.6V supply, delivers −4mA output drive at 3.0V, features IOFF partial power-down protection, and supports Schmitt-trigger inputs with ~250mV hysteresis at VCC = 3.0V - used in battery-powered I²C bus extensions and voltage-level translation between mixed-supply domains.
For engineers reviewing the 74AUP2G07FZ4-7 datasheet, 74AUP2G07FZ4-7 pinout, 74AUP2G07FZ4-7 application, or 74AUP2G07FZ4-7 equivalent, key selection criteria include its 0.9µA max ICC at 3.6V, 1.2pF typical CPD, IOFF-enabled isolation during partial power-down, and compatibility with 0.35mm–0.5mm pitch DFN packages for space-constrained embedded designs.
Technical Context
This device implements two independent non-inverting buffers (A→Y) with open-drain outputs, enabling wired-AND/wired-OR configurations and bidirectional level translation without external pull-ups on the output side. Each input includes Schmitt-trigger action with 250mV typical hysteresis at 3.0V, improving noise immunity for slow-rising signals.
The IOFF circuit actively disables both outputs when VCC = 0V, blocking reverse current flow from powered downstream nodes into the unpowered IC - critical for hot-swap and multi-rail system partitioning. It is fully characterized from −40°C to +125°C and supports 200 ns/V minimum input transition rate.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 0.8V to 3.6V - enables direct interface with 1.2V, 1.8V, 2.5V, and 3.3V logic domains without level shifters. |
| Max ICC (Static) | < 0.9µA at 3.6V - ensures sub-1µA quiescent draw for always-on battery monitoring circuits. |
| Output Drive (IOL) | −4mA at VCC = 3.0V - sufficient to sink standard I²C bus capacitance (400pF) at 400kHz with 2.2kΩ pull-up. |
| Propagation Delay | 0.9ns (min) / 3.5ns (max) at 3.3V, CL = 5pF - supports high-speed signal buffering in low-latency sensor interfaces. |
| Input Hysteresis | ~250mV at VCC = 3.0V - rejects noise on slow GPIO lines (e.g., mechanical switch debouncing or ambient sensor outputs). |
| IOFF Leakage | ±0.75µA max at VCC = 0V - prevents backfeed current from 3.3V peripherals into a powered-down 1.8V subsystem. |
| ESD Protection | 2kV HBM, 1kV CDM - meets industrial I/O robustness requirements without external TVS diodes. |
Pinout & Package
X2-DFN1410-6 package: 1.4mm × 1.0mm × 0.4mm body, 0.5mm pad pitch, wettable flank leads, lead-free and RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1A | Input A of Buffer 1 | Non-inverting digital input; accepts 0.8V–3.6V logic levels with Schmitt-trigger threshold. |
| GND | Ground Reference | Primary return path for supply and signal currents; must be low-impedance for noise control. |
| 2A | Input A of Buffer 2 | Independent non-inverting input; electrically isolated from 1A but shares same VCC/GND rails. |
| 2Y | Open-Drain Output Y2 | Sinks current only; requires external pull-up to define high state - enables wired-OR bus topology. |
| VCC | Power Supply | Single supply rail powering both buffers; IOFF activates automatically if pulled to 0V. |
| 1Y | Open-Drain Output Y1 | Independent open-drain output; may be tied to 2Y for logical AND or driven separately. |
Key Features
| Feature | Design Value |
|---|---|
| Advanced Ultra Low Power (AUP) CMOS | Reduces dynamic power by >50% vs. standard AHC logic at 1.8V, extending coin-cell life in wearables. |
| IOFF Partial Power-Down Support | Disables outputs and blocks reverse current when VCC = 0V - essential for PCIe slot hot-plug and modular IoT node design. |
| Schmitt-Trigger Inputs | 250mV hysteresis at 3.0V eliminates contact bounce and EMI-induced glitches on mechanical or analog-derived digital inputs. |
| Wide-Voltage Operation (0.8V–3.6V) | Eliminates need for discrete level translators between 1.2V SoC I/O and 3.3V peripheral buses like UART or SMBus. |
| Lead-Free X2-DFN1410-6 Package | 0.4mm height and 1.4mm × 1.0mm footprint enable placement under connectors or near BGA escape routing in compact PCBs. |
Applications
| I²C Bus Level Translation | Low-Power Sensor Interface |
|---|---|
|
Use Scenario: Translating I²C signals between a 1.8V microcontroller and a 3.3V temperature sensor in a battery-powered environmental monitor. IC Role / Device Role / Timing Role: Dual open-drain buffer provides bidirectional SDA/SCL translation without direction control pins; Schmitt inputs tolerate slow rise times from long traces. Use Value: Eliminates need for dedicated I²C translator ICs, reducing BOM count and PCB area while maintaining 400kHz timing compliance. |
Use Scenario: Conditioning push-button and reed-switch inputs in a medical patch sensor worn for 7-day continuous operation. IC Role / Device Role / Timing Role: Buffers act as debounced, noise-immune digital inputs; IOFF prevents battery drain when MCU enters deep sleep and VCC drops. Use Value: Achieves <1µA system standby current by leveraging IOFF and sub-µA ICC, directly extending battery life by >20%. |
| Wired-OR Interrupt Aggregation | Hot-Swappable Module Detection |
|
Use Scenario: Combining interrupt signals from multiple low-power peripherals (accelerometer, gyro, magnetometer) onto a single MCU IRQ line. IC Role / Device Role / Timing Role: Two open-drain outputs tied together form a hardware OR gate; each buffer drives one peripheral's INT# signal. Use Value: Reduces required MCU GPIO count by 2× and avoids software polling, lowering active-mode CPU load and power consumption. |
Use Scenario: Detecting insertion/removal of a daughterboard in an industrial gateway with mixed-voltage backplane (1.2V core, 3.3V I/O). IC Role / Device Role / Timing Role: Buffers isolate daughterboard I/O from main board during hot-swap; IOFF prevents backfeed when daughterboard is unpowered. Use Value: Enables safe live insertion without risk of latch-up or damage to powered main board, meeting IEC 61000-4-2 Class B immunity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual open-drain buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC2G07DBVR | Wider VCC range (1.65V–5.5V); higher IOL (−32mA at 3.3V); no Schmitt inputs; no IOFF. | Better for 5V-tolerant systems or high-drive needs; unsuitable for partial power-down or noisy low-slew-rate inputs. | Select when driving heavier loads or interfacing with legacy 5V peripherals; avoid where IOFF or Schmitt noise rejection is required. |
| 74LVC2G17GW,125 | Same VCC range (1.65V–5.5V); Schmitt inputs included; open-drain outputs; no IOFF; slightly higher ICC (2µA typical). | Matches noise immunity requirement but lacks power-down isolation; not rated for sub-1V operation. | Prefer for cost-sensitive consumer designs needing Schmitt inputs above 1.65V; reject for battery-critical or multi-rail isolation use cases. |
Compared with SN74LVC2G07DBVR and 74LVC2G17GW,125, the 74AUP2G07FZ4-7 uniquely combines sub-1V operation, IOFF, and Schmitt inputs - making it the only choice for ultra-low-voltage, hot-swap-safe, noise-prone portable systems requiring <1µA static power.
Availability
74AUP2G07FZ4-7 is available at Aetrix Electronics and suitable for battery-powered wearables, industrial sensor nodes, and portable medical devices requiring stable component supply across extended product lifecycles.
Supply support for 74AUP2G07FZ4-7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-efficiency power management, signal integrity, and precision timing solutions for industrial, computing, and consumer markets.
The 74AUP logic family targets ultra-low-power portable electronics, delivering sub-1µA static current and wide-voltage operation to extend battery life in space-constrained, multi-rail embedded systems.
FAQ
Can 74AUP2G07FZ4-7 drive a standard I²C bus at 400kHz?
Yes. At VCC = 3.3V, it sinks −4mA, which supports a 2.2kΩ pull-up on a 400pF bus - meeting I²C Fast Mode timing (≤3.5µs rise time). Its 0.9ns min/3.5ns max propagation delay at CL = 5pF ensures minimal added latency, and Schmitt inputs tolerate slower edge rates common in long-trace or capacitive bus environments.
What happens to the outputs when VCC is disconnected?
When VCC = 0V, the IOFF circuit activates, disabling both 1Y and 2Y outputs and limiting leakage to ±0.75µA maximum. This prevents reverse current flow from externally powered pull-up resistors or downstream devices, protecting unpowered circuit sections during hot-swap or partial shutdown - a key requirement in modular IoT hardware.
Is the X2-DFN1410-6 package compatible with standard reflow profiles?
Yes. The X2-DFN1410-6 package is qualified for IPC/JEDEC J-STD-020D moisture sensitivity level 1 (MSL1), supporting peak reflow temperatures up to 260°C. Its 0.5mm pad pitch and wettable flanks enable reliable solder joint inspection via automated optical inspection (AOI), and the 0.4mm profile allows placement beneath tall connectors in ultra-thin PCB stacks.
How does the Schmitt-trigger input improve system reliability?
The ~250mV hysteresis at VCC = 3.0V prevents multiple toggles caused by slow-rising signals or noise near the logic threshold - critical for mechanical switch inputs, thermistor-based comparators, or long-flex-cable sensor links. Unlike standard CMOS inputs, it guarantees clean, single-edge transitions even with 10–100ns input slew rates, eliminating need for external RC filtering or firmware debouncing.
74AUP2G07FZ4-7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Diodes Incorporated
- Series:
- 74AUP
- Package/Case:
- 6-XFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 2
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- Open Drain
- Current - Output High, Low:
- -, 4mA
- Voltage - Supply:
- 0.8V ~ 3.6V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- X2-DFN1410-6
74AUP2G07FZ4-7 FAQ
1.How can I place an order for 74AUP2G07FZ4-7 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP2G07FZ4-7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP2G07FZ4-7 reliable?
The price and inventory of 74AUP2G07FZ4-7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP2G07FZ4-7 is usually 5 days.
3.What payment methods are accepted for 74AUP2G07FZ4-7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP2G07FZ4-7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP2G07FZ4-7?
74AUP2G07FZ4-7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP2G07FZ4-7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP2G07FZ4-7?
For technical support, including 74AUP2G07FZ4-7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP2G07FZ4-7 requirements.
6.How does Aetrix verify that 74AUP2G07FZ4-7 is sourced from the original manufacturer or authorized distributors?
All 74AUP2G07FZ4-7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP2G07FZ4-7 meets industry standards.
7.What is the process for return or replacement of 74AUP2G07FZ4-7?
All 74AUP2G07FZ4-7 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP2G07FZ4-7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP2G07FZ4-7 part is unused and in its original packaging.
Return procedure for 74AUP2G07FZ4-7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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