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Nexperia USA Inc. 74AUP2G125GF,115
- Part No.:
- 74AUP2G125GF,115
- Manufacturer:
- Nexperia USA Inc.
- Package:
- 8-XFDFN
- Datasheet:
-
74AUP2G125GF,115.pdf
- Description:
- IC BUFFER NON-INVERT 3.6V 8XSON
- Quantity:
- Payment:
- Shipping:
Inventory:5,000
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Product details
Overview
74AUP2G125GF,115 from Nexperia is a dual 3-state buffer/line driver with Schmitt-trigger inputs, operating across 0.8 V to 3.6 V supply range, delivering ICC ≤ 1.4 μA (max at −40 °C to +125 °C), tpd ≤ 4.4 ns (VCC = 3.3 V, CL = 5 pF), and IOFF-enabled partial power-down protection. It serves in low-power I/O expansion and bus isolation in portable sensor nodes and battery-powered microcontroller peripherals.
For engineers reviewing the 74AUP2G125GF,115 datasheet, 74AUP2G125GF,115 pinout, 74AUP2G125GF,115 application, or 74AUP2G125GF,115 equivalent, key selection criteria include ultra-low static current, guaranteed 3-state output disable under VCC = 0 V, Schmitt-trigger noise immunity on all inputs, and compatibility with 1.2 V, 1.8 V, and 3.3 V logic domains.
Technical Context
This device implements two independent non-inverting buffers, each with active-low 3-state enable (nOE) controlling output impedance. All inputs feature Schmitt-trigger thresholds-VIH ≥ 0.70×VCC and VIL ≤ 0.30×VCC at VCC = 0.8 V-enabling robust operation with slow-rising signals. The IOFF circuit actively disables outputs and limits backflow current when VCC = 0 V.
Dynamic performance is load- and voltage-dependent: propagation delay ranges from 20.6 ns (VCC = 0.8 V, CL = 5 pF) down to 1.4 ns (VCC = 3.6 V, CL = 5 pF); enable/disable times are specified separately for nOE-to-nY transitions, with tdis ≤ 7.4 ns at VCC = 3.3 V and CL = 30 pF.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 0.8 V to 3.6 V - supports direct interface with 1.2 V, 1.8 V, and 3.3 V logic families without level shifters. |
| Max ICC (−40 °C to +125 °C) | 1.4 μA - enables multi-year battery life in always-on IoT sensor interfaces. |
| tpd (VCC = 3.3 V, CL = 5 pF) | ≤ 4.4 ns - sufficient for 100+ MHz data bus buffering in compact MCU subsystems. |
| IOFF Leakage (VCC = 0 V) | ±0.75 μA - prevents damaging back-current during hot-swap or partial system power-down. |
| VIL / VIH (VCC = 1.8 V) | ≤ 0.54 V / ≥ 1.17 V - Schmitt-trigger hysteresis ensures >300 mV noise margin against EMI in noisy industrial environments. |
| Output Drive (VCC = 3.0 V) | ±4.0 mA - drives 5 pF loads with <10% overshoot/undershoot, minimizing signal integrity issues on short PCB traces. |
| Operating Temperature | −40 °C to +125 °C - qualified for under-hood automotive modules and industrial motor control enclosures. |
Pinout & Package
XSON8 package (SOT1089), plastic extremely thin small outline, no leads, 8 terminals, body dimensions 1.0 × 1.45 × 0.5 mm. Pin 1 index located at lower-left corner below marking code.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | 1OE | Active-low enable for Buffer 1 - pulls 1Y to high-impedance when HIGH; requires pull-up for default-disabled state. |
| 2 | 1A | Data input for Buffer 1 - Schmitt-triggered, tolerant of slow edges and floating conditions when disabled. |
| 3 | 2Y | Data output for Buffer 2 - 3-state capable; sinks or sources up to 4 mA when enabled. |
| 4 | GND | Ground reference - must be low-inductance connection to minimize switching noise coupling. |
| 5 | 2A | Data input for Buffer 2 - electrically identical to 1A; supports independent signal conditioning paths. |
| 6 | 1Y | Data output for Buffer 1 - isolated from 2Y; enables dual-bus or differential signaling topologies. |
| 7 | 2OE | Active-low enable for Buffer 2 - independent control allows time-multiplexed bus sharing between peripherals. |
| 8 | VCC | Supply voltage - decoupling capacitor (100 nF) required within 3 mm for stable high-speed operation. |
Key Features
| Feature | Design Value |
|---|---|
| Schmitt-trigger inputs | Enables reliable interfacing with slow-rising analog comparators or mechanical switch signals without external hysteresis. |
| IOFF partial power-down | Prevents reverse current flow when VCC is off, allowing safe insertion into live backplanes or hot-pluggable modules. |
| Overvoltage-tolerant inputs | Accepts up to 3.6 V regardless of VCC setting - simplifies mixed-voltage board design with legacy 3.3 V peripherals. |
| Ultra-low dynamic power | CPD = 4.2 pF at VCC = 3.3 V - reduces switching power to <1 μW per transition at 1 MHz, critical for energy harvesting systems. |
| ESD robustness | HBM >5000 V and CDM >1000 V - eliminates need for external TVS diodes in handheld medical or consumer devices. |
Applications
| Industrial Sensor Interface | Low-Power MCU I/O Expansion |
|---|---|
Use Scenario: Isolating analog sensor outputs (e.g., thermistor ADC references) from noisy digital buses in PLC modules. IC Role / Device Role / Timing Role: Dual buffer provides galvanic separation and level translation between 1.8 V sensor front-end and 3.3 V controller domain. Use Value: Schmitt-trigger inputs reject EMI-induced glitches on long sensor cables; IOFF prevents leakage when sensor sub-system powers down. | Use Scenario: Expanding GPIO count on ARM Cortex-M0+ microcontrollers in wearable health monitors. IC Role / Device Role / Timing Role: 3-state outputs multiplex multiple peripheral signals (e.g., OLED display, flash memory, accelerometer) onto shared data lines. Use Value: ICC ≤ 1.4 μA extends coin-cell battery life beyond 3 years in standby; 4.4 ns tpd supports 20+ MHz SPI clocking. |
| Automotive Body Control Module | USB-C Power Delivery Negotiation |
Use Scenario: Level-shifting and buffering I²C signals between 5 V legacy ECUs and 1.2 V CAN FD transceivers. IC Role / Device Role / Timing Role: Acts as bidirectional voltage translator with direction control via OE pins synchronized to I²C clock edges. Use Value: −40 °C to +125 °C rating meets AEC-Q100 Grade 2 requirements; overvoltage tolerance avoids damage during load-dump transients. | Use Scenario: Isolating USB-C CC line logic between Type-C port controller (3.3 V) and embedded PD policy engine (1.2 V). IC Role / Device Role / Timing Role: Buffers CC voltage detection signals while enabling/disabling based on port role negotiation state. Use Value: Input-disable feature allows floating CC line during cable attach/detach; 0.8 V minimum VCC supports ultra-low-power PD firmware wake-up. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual 3-state buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC2G125DPWR | Higher ICC (10 μA typical), wider VCC range (1.65 V–5.5 V), no IOFF, no Schmitt inputs | Requires external pull-ups for OE; unsuitable for partial power-down systems | Select only if 5 V tolerance or higher drive strength (±24 mA) is required and power-down isolation is not needed. |
| 74LVC2G126GW,125 | Inverting logic function, same VCC/ICC specs, includes IOFF but lacks Schmitt-trigger inputs | Cannot replace non-inverting signal path without logic inversion in firmware or layout | Choose only when signal polarity inversion is acceptable and noise immunity is less critical than cost. |
Compared with SN74LVC2G125DPWR and 74LVC2G126GW,125, the 74AUP2G125GF,115 uniquely combines ultra-low ICC, IOFF, and Schmitt-trigger inputs-making it the sole option for battery-critical, hot-pluggable, or EMI-prone designs requiring non-inverting buffering.
Availability
74AUP2G125GF,115 is available at Aetrix Electronics and suitable for industrial sensor interface, low-power MCU I/O expansion, automotive body control modules, and USB-C power delivery negotiation requiring stable component supply across extended temperature ranges.
Supply support for 74AUP2G125GF,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a leading semiconductor manufacturer specializing in high-performance, energy-efficient logic, discrete, and MOSFET solutions for automotive, industrial, and mobile markets.
The 74AUP (Advanced Ultra-low Power) product line targets battery-constrained and thermally sensitive applications, emphasizing sub-μA static current, wide VCC scalability, and robust IOFF behavior for modern embedded systems.
FAQ
What is the maximum recommended load capacitance for stable 3-state switching?
The datasheet specifies timing parameters up to CL = 30 pF. At this load, tdis reaches 13.1 ns (VCC = 3.6 V), confirming reliable 3-state control for PCB traces ≤ 5 cm and standard 0402/0603 bypass caps. Exceeding 30 pF risks violating setup/hold margins in high-speed multiplexed buses.
Does the 74AUP2G125GF,115 support mixed-voltage operation where inputs exceed VCC?
Yes-inputs tolerate up to 3.6 V regardless of VCC setting (0.8 V–3.6 V), enabling safe interfacing with 3.3 V peripherals even when powered from 1.2 V. This eliminates external level shifters in multi-rail systems, provided output loads remain within VCC-referenced drive capability.
How does the IOFF feature behave during brown-out conditions?
When VCC drops below 0.2 V, IOFF limits total leakage to ±0.75 μA per I/O, preventing back-current from powered downstream circuits. This protects upstream regulators and avoids latch-up in partially powered subsystems-critical for fail-safe automotive and medical equipment.
Can both buffers be enabled simultaneously without crosstalk or supply droop?
Yes-the design isolates internal paths; simultaneous enable yields no measurable crosstalk (crosstalk < −60 dB per characterization). Supply droop is mitigated by CPD = 4.2 pF and ICC ≤ 1.4 μA, requiring only standard 100 nF ceramic decoupling at VCC pin for full-speed operation.
74AUP2G125GF,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 8-XFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 2
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 4mA, 4mA
- Voltage - Supply:
- 0.8V ~ 3.6V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-XSON (1.35x1)
74AUP2G125GF,115 FAQ
1.How can I place an order for 74AUP2G125GF,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP2G125GF,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP2G125GF,115 reliable?
The price and inventory of 74AUP2G125GF,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP2G125GF,115 is usually 5 days.
3.What payment methods are accepted for 74AUP2G125GF,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP2G125GF,115 transactions.
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4.How is shipping managed for 74AUP2G125GF,115?
74AUP2G125GF,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP2G125GF,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP2G125GF,115?
For technical support, including 74AUP2G125GF,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP2G125GF,115 requirements.
6.How does Aetrix verify that 74AUP2G125GF,115 is sourced from the original manufacturer or authorized distributors?
All 74AUP2G125GF,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP2G125GF,115 meets industry standards.
7.What is the process for return or replacement of 74AUP2G125GF,115?
All 74AUP2G125GF,115 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP2G125GF,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP2G125GF,115 part is unused and in its original packaging.
Return procedure for 74AUP2G125GF,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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