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Nexperia USA Inc. 74AUP2G125GT,115
- Part No.:
- 74AUP2G125GT,115
- Manufacturer:
- Nexperia USA Inc.
- Package:
- 8-XFDFN
- Datasheet:
-
74AUP2G125GT,115.pdf
- Description:
- IC BUFFER NON-INVERT 3.6V 8XSON
- Quantity:
- Payment:
- Shipping:
Inventory:3,511
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Product details
Overview
74AUP2G125GT,115 from Nexperia is a dual 3-state buffer/line driver with Schmitt-trigger inputs, operating across 0.8 V to 3.6 V supply, delivering ICC ≤ 1.4 μA (max) at −40 °C to +125 °C, tpd ≤ 4.4 ns (VCC = 3.3 V, CL = 5 pF), and IOFF-enabled partial power-down protection. It serves in low-power interface isolation for battery-powered sensor nodes and I²C/SPI bus signal conditioning.
For engineers reviewing the 74AUP2G125GT,115 datasheet, 74AUP2G125GT,115 pinout, 74AUP2G125GT,115 application, or 74AUP2G125GT,115 equivalent, key selection criteria include ultra-low static current, rail-to-rail input tolerance up to 3.6 V, guaranteed 3-state behavior during power sequencing, and XSON8 package compatibility with high-density PCB layouts.
Technical Context
This device implements two independent non-inverting buffers, each with active-low 3-state output enable (1OE, 2OE). Schmitt-trigger inputs provide hysteresis (typically 0.1 × VCC), enabling robust noise immunity against slow-rising signals in mixed-voltage systems.
The IOFF circuit ensures outputs are high-impedance when VCC = 0 V, preventing backflow current during hot-swap or partial power-down. Input-disable capability allows floating inputs without leakage-induced state instability, critical for unpowered subsystems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 0.8 V to 3.6 V - supports direct interfacing with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters |
| Max ICC (−40 °C to +125 °C) | 1.4 μA - enables multi-year operation in energy-harvesting or coin-cell-powered applications |
| tpd (VCC = 3.3 V, CL = 5 pF) | 4.4 ns - sufficient for 100 MHz data rates in buffered control lines and address latching |
| IOFF Leakage (VCC = 0 V) | ±0.75 μA - limits backfeed current during system sleep states, preserving upstream power integrity |
| Input Hysteresis | Typ. 0.1 × VCC - rejects noise on long traces or noisy PCB environments without external RC filtering |
| ESD Rating (HBM) | 5000 V - meets industrial-grade handling requirements without additional protection circuitry |
| Operating Temperature | −40 °C to +125 °C - qualified for under-hood automotive modules and industrial motor drives |
Pinout & Package
XSON8 plastic extremely thin small outline package (SOT833-1); no leads; 8 terminals; body dimensions 1.0 mm × 1.95 mm × 0.5 mm; thermal pad optional; pin 1 indicator located below marking code in lower-left corner.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1Y | Data output (Buffer 1) | Non-inverting output driven only when 1OE = LOW; high-impedance otherwise |
| 2OE | Output enable (Buffer 2) | Active-LOW control: asserts 2Y when LOW; disables 2Y (Z-state) when HIGH |
| VCC | Power supply | Single supply rail supporting full 0.8–3.6 V range; powers both buffers and IOFF circuitry |
| 2A | Data input (Buffer 2) | Schmitt-trigger input tolerant to overvoltage up to 3.6 V regardless of VCC |
| 2Y | Data output (Buffer 2) | Non-inverting output synchronized to 2A; enabled/disabled by 2OE |
| 1A | Data input (Buffer 1) | Schmitt-trigger input with same overvoltage tolerance and hysteresis as 2A |
| 1OE | Output enable (Buffer 1) | Independent active-LOW control for 1Y; enables concurrent or staggered buffer activation |
| GND | Ground reference | 0 V return path for all internal logic and output drivers; must be low-impedance |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail input tolerance | Inputs accept voltages up to 3.6 V independent of VCC, eliminating need for external clamping diodes |
| IOFF partial power-down | Outputs go high-Z when VCC = 0 V, preventing reverse current flow into powered sections of mixed-supply systems |
| Input-disable capability | Allows safe floating of unused inputs without risk of increased ICC or undefined output states |
| Low-noise switching | Overshoot/undershoot < 10 % of VCC minimizes EMI in sensitive analog or RF-adjacent layouts |
| JEDEC-compliant voltage standards | Fully compliant with JESD8-12 through JESD8-B across five VCC ranges, ensuring interoperability in multi-vendor designs |
Applications
| Industrial Sensor Interface | Automotive Body Control Module |
|---|---|
|
Use Scenario: Isolating analog sensor outputs before ADC sampling in a 1.8 V microcontroller domain. IC Role / Device Role / Timing Role: Level-shifting and noise-filtering buffer between 3.3 V sensor and 1.8 V MCU, with Schmitt-trigger inputs rejecting trace-coupled noise. Use Value: Eliminates external RC filters and discrete level shifters while maintaining < 5 ns propagation delay for real-time response. |
Use Scenario: Driving LIN bus transceiver enable lines in a thermally constrained door module. IC Role / Device Role / Timing Role: Dual-buffered control signal conditioner with independent OE pins enabling staggered wake-up sequencing. Use Value: IOFF prevents backfeed from 12 V LIN side into 3.3 V MCU domain during ignition-off, meeting ISO 16750-2 transient immunity. |
| Wearable Health Monitor | IoT Edge Node |
|
Use Scenario: Buffering PPG sensor timing pulses to an ultra-low-power ARM Cortex-M0+ core. IC Role / Device Role / Timing Role: Low-leakage signal repeater enabling 10-year battery life via sub-μA static current and 3-state hold during sleep. Use Value: ICC ≤ 1.4 μA at +125 °C ensures stable operation inside sealed enclosures without thermal derating penalties. |
Use Scenario: Isolating SPI MISO/MOSI lines between ESP32-WROOM-32 (3.3 V) and legacy 2.5 V flash memory. IC Role / Device Role / Timing Role: Dual-directional voltage-tolerant buffer enabling bidirectional communication without direction-control logic. Use Value: Overvoltage-tolerant inputs allow direct connection to 2.5 V flash I/O while powered from 3.3 V rail, reducing BOM count by one level shifter. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual 3-state buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC2G125DCUR | Higher ICC (10 μA typ), wider VCC range (1.65–5.5 V), no IOFF, no Schmitt inputs | Requires external pull-ups for floating inputs; unsuitable for true zero-VCC isolation | Select when interfacing 5 V peripherals and Schmitt noise immunity is not required |
| 74LVC2G126GT,115 | Inverting output polarity; identical VCC, ICC, tpd, and package; same IOFF/Schmitt specs | Requires logic inversion in firmware or upstream logic; not drop-in for non-inverting paths | Choose only when system-level signal polarity aligns with inverting function |
Compared with SN74LVC2G125DCUR and 74LVC2G126GT,115, the 74AUP2G125GT,115 uniquely combines sub-μA ICC, IOFF, and Schmitt inputs in XSON8 - making it the sole option for battery-critical, mixed-rail, noise-prone applications requiring guaranteed 3-state behavior at VCC = 0 V.
Availability
74AUP2G125GT,115 is available at Aetrix Electronics and suitable for industrial sensor interfaces, automotive body control modules, wearable health monitors, and IoT edge nodes requiring stable component supply across extended temperature and low-power constraints.
Supply support for 74AUP2G125GT,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert specializing in high-performance, energy-efficient logic, analog, and discrete components, with leadership in automotive-grade reliability and miniaturized packaging.
The 74AUP (Advanced Ultra-low Power) product line targets ultra-low-power digital interface applications where static current, dynamic switching efficiency, and robustness across wide VCC ranges are primary design constraints.
FAQ
What is the maximum capacitive load the 74AUP2G125GT,115 can drive while maintaining specified tpd?
The device is characterized up to CL = 30 pF across all VCC ranges. At VCC = 3.3 V and CL = 30 pF, tpd is 8.3 ns (max) - within specification. Driving >30 pF increases propagation delay nonlinearly and may exceed setup/hold margins in high-speed synchronous interfaces; external buffering is recommended beyond this limit.
Can 74AUP2G125GT,115 safely interface a 3.6 V input signal while VCC = 1.8 V?
Yes. Inputs tolerate up to 3.6 V regardless of VCC due to overvoltage-tolerant input structure. VIH minimum remains 0.65 × VCC (1.17 V at 1.8 V), ensuring reliable HIGH detection. No external clamping is needed, simplifying inter-voltage-domain signal routing.
Does the IOFF feature activate automatically when VCC drops below a threshold?
IOFF activates whenever VCC = 0 V - not at a voltage threshold. The circuit forces outputs into high-impedance only when supply is fully absent. During brown-out (e.g., VCC = 0.3 V), outputs remain functional but performance degrades per datasheet limits; IOFF does not engage until VCC reaches 0 V.
Is the XSON8 package (SOT833-1) compatible with standard reflow profiles for lead-free assembly?
Yes. SOT833-1 is qualified for IPC/JEDEC J-STD-020D moisture sensitivity level 1 (MSL1) and supports peak reflow temperatures up to 260 °C. Its 0.5 mm profile and thermal mass are validated for standard Pb-free convection reflow, including ramp-soak-reflow profiles with Tpeak = 245–260 °C.
74AUP2G125GT,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 8-XFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 2
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 4mA, 4mA
- Voltage - Supply:
- 0.8V ~ 3.6V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-XSON, SOT833-1 (1.95x1)
74AUP2G125GT,115 FAQ
1.How can I place an order for 74AUP2G125GT,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP2G125GT,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP2G125GT,115 reliable?
The price and inventory of 74AUP2G125GT,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP2G125GT,115 is usually 5 days.
3.What payment methods are accepted for 74AUP2G125GT,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP2G125GT,115 transactions.
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4.How is shipping managed for 74AUP2G125GT,115?
74AUP2G125GT,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP2G125GT,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP2G125GT,115?
For technical support, including 74AUP2G125GT,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP2G125GT,115 requirements.
6.How does Aetrix verify that 74AUP2G125GT,115 is sourced from the original manufacturer or authorized distributors?
All 74AUP2G125GT,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP2G125GT,115 meets industry standards.
7.What is the process for return or replacement of 74AUP2G125GT,115?
All 74AUP2G125GT,115 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP2G125GT,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP2G125GT,115 part is unused and in its original packaging.
Return procedure for 74AUP2G125GT,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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