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Nexperia USA Inc. 74AUP2G126GF,115
- Part No.:
- 74AUP2G126GF,115
- Manufacturer:
- Nexperia USA Inc.
- Package:
- 8-XFDFN
- Datasheet:
-
74AUP2G126GF,115.pdf
- Description:
- IC BUFFER NON-INVERT 3.6V 8XSON
- Quantity:
- Payment:
- Shipping:
Inventory:5,000
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Product details
Overview
74AUP2G126GF,115 from Nexperia is a dual CMOS buffer/line driver with independent 3-state outputs controlled by active-HIGH output enable inputs (1OE, 2OE). It operates across 0.8 V to 3.6 V supply, delivers propagation delay as low as 1.4 ns at 3.6 V (CL = 5 pF), supports partial power-down via IOFF circuitry, and features Schmitt-trigger inputs for noise immunity in noisy digital interfaces such as I²C bus extensions and sensor signal conditioning.
For engineers reviewing the 74AUP2G126GF,115 datasheet, 74AUP2G126GF,115 pinout, 74AUP2G126GF,115 application, or 74AUP2G126GF,115 equivalent, this device is selected for ultra-low static current (≤1.4 μA max), rail-to-rail input tolerance up to 3.6 V, and guaranteed operation from –40 °C to +125 °C in space-constrained industrial control and battery-powered IoT node designs.
Technical Context
The device implements two independent non-inverting buffers, each with dedicated output enable (nOE) and Schmitt-trigger input (nA), enabling robust signal restoration in slow-rising or noisy environments. Its IOFF circuit actively disables outputs during power-down, blocking backflow current when VCC = 0 V.
All inputs tolerate voltages up to 3.6 V regardless of VCC level, and the output structure supports high-impedance (Z) states with leakage ≤±0.75 μA over full temperature range. Dynamic performance is characterized across CL = 5–30 pF and VCC = 0.8–3.6 V, with disable time as low as 1.2 ns at 3.6 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 0.8 V to 3.6 V - enables direct interfacing with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters. |
| Max ICC (Static) | 1.4 μA at –40 °C to +125 °C - ensures negligible battery drain in always-on sensor nodes or backup circuits. |
| tpd (nA → nY) | 1.4 ns typical at VCC = 3.6 V, CL = 5 pF - supports >350 MHz data rates in short trace applications like FPGA I/O expansion. |
| IOFF Leakage | ±0.75 μA at VCC = 0 V - prevents cross-talk and damage in hot-swap or multi-rail systems during power sequencing. |
| Input Hysteresis | Typical 120 mV (Schmitt-trigger) - rejects noise spikes up to 120 mV on slow edges, critical for mechanical switch debouncing or long PCB traces. |
| ESD Rating | HBM >5000 V, CDM >1000 V - meets industrial IEC 61000-4-2 immunity requirements without external protection. |
| Operating Temperature | –40 °C to +125 °C - qualified for under-hood automotive modules and industrial motor drives. |
Pinout & Package
XSON8 package (SOT833-1): plastic extremely thin small outline, no leads, 8 terminals, body size 1.0 mm × 1.95 mm × 0.5 mm, thermal padless, pin 1 marked by lower-left corner notch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1Y | Output (Buffer 1) | Non-inverting buffered output; driven HIGH/LOW when 1OE = HIGH, high-impedance when 1OE = LOW. |
| 2OE | Output Enable (Buffer 2) | Active-HIGH control: enables/disables 2Y output independently of 1OE and other channels. |
| VCC | Power Supply | Single supply input; powers both buffers and IOFF circuitry; accepts 0.8–3.6 V with full functionality. |
| 2A | Input (Buffer 2) | Data input with Schmitt-trigger action; accepts 0–3.6 V regardless of VCC, enabling mixed-voltage interfacing. |
| 2Y | Output (Buffer 2) | Non-inverting buffered output; identical timing and drive strength to 1Y; fully isolated from 1Y path. |
| 1A | Input (Buffer 1) | Data input with Schmitt-trigger action; immune to slow edges and EMI-induced glitches on PCB traces. |
| 1OE | Output Enable (Buffer 1) | Active-HIGH control: enables/disables 1Y output; allows independent channel gating in multiplexed buses. |
| GND | Ground Reference | 0 V reference for all inputs, outputs, and internal logic; must be low-impedance for stable IOFF operation. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low static power | ICC ≤ 1.4 μA over full temperature range - extends battery life in energy-harvesting sensors and wearable devices. |
| IOFF partial power-down | Blocks backflow current when VCC = 0 V - eliminates risk of unintended powering from I/O lines in modular systems. |
| Schmitt-trigger inputs | 120 mV typical hysteresis - eliminates need for external RC filtering in noisy industrial environments or mechanical switch interfaces. |
| Rail-tolerant inputs | VI up to 3.6 V independent of VCC - simplifies interconnection between 1.8 V microcontrollers and 3.3 V peripherals without translators. |
| High noise immunity | CMOS design with >40 % noise margin at VCC = 3.3 V - maintains signal integrity in motor-drive adjacent PCB layouts. |
Applications
| Industrial Sensor Interface | I²C Bus Extender |
|---|---|
|
Use Scenario: Connecting multiple analog sensor outputs to a single ADC input with shared ground and long trace runs. IC Role / Device Role / Timing Role: Dual buffer isolates sensor signals, restores edge integrity via Schmitt-trigger inputs, and enables/disables channels via independent OE pins. Use Value: Eliminates signal degradation from trace capacitance and EMI, reducing calibration drift and false triggers in factory automation systems. |
Use Scenario: Extending I²C SDA/SCL lines beyond 40 cm while maintaining 400 kHz timing compliance. IC Role / Device Role / Timing Role: One buffer drives SDA, the other drives SCL; OE pins synchronized to master clock to gate bus segments during arbitration. Use Value: Enables reliable multi-drop I²C topology with <1.4 ns propagation delay and <3.4 ns disable time, preserving setup/hold margins. |
| Battery-Powered IoT Node | Automotive Body Control Module |
|
Use Scenario: Low-power microcontroller GPIO expansion for push-button inputs and LED drivers in coin-cell powered asset trackers. IC Role / Device Role / Timing Role: Buffers condition mechanical switch inputs and drive LEDs; IOFF disables outputs during deep sleep (VCC = 0 V). Use Value: Reduces system quiescent current to sub-μA levels while maintaining fast wake-up response and eliminating external pull-ups. |
Use Scenario: Signal conditioning for door lock actuator feedback and window position sensors in harsh under-dash environments. IC Role / Device Role / Timing Role: Buffers isolate MCU GPIOs from inductive load transients; Schmitt inputs reject ignition noise; rated for –40 °C to +125 °C. Use Value: Prevents spurious lock/unlock commands and improves sensor accuracy in high-EMI automotive cabins without added filtering components. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual buffer/line driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC2G126DPWR | Wider VCC range (1.65–5.5 V); higher ICC (10 μA typ); no IOFF; no Schmitt inputs. | Requires external level translation below 1.65 V; unsuitable for true zero-VCC isolation. | Select when interfacing legacy 5 V peripherals and higher drive strength (24 mA) is needed. |
| 74LVC2G126GM,132 | Same XSON8 package; VCC = 1.65–5.5 V; ICC = 10 μA; no IOFF; standard CMOS inputs (no hysteresis). | Lacks Schmitt-trigger noise rejection and IOFF protection - requires external clamping for hot-swap use. | Choose for cost-sensitive consumer applications where 1.65 V minimum supply and no power-down are acceptable. |
Compared with SN74LVC2G126DPWR and 74LVC2G126GM,132, the 74AUP2G126GF,115 uniquely combines sub-μA static current, Schmitt-trigger inputs, and IOFF in a 1.0 mm × 1.95 mm XSON8 package - making it the only option for battery-critical, noise-prone, or multi-rail hot-swap designs.
Availability
74AUP2G126GF,115 is available at Aetrix Electronics and suitable for industrial sensor interface, I²C bus extension, battery-powered IoT node, and automotive body control module applications requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for 74AUP2G126GF,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance, reliable discrete, logic, and MOSFET solutions optimized for efficiency and miniaturization in industrial, automotive, and mobile markets.
The 74AUP (Advanced Ultra-low Power) product line targets ultra-low-power digital interfacing in space- and energy-constrained systems, emphasizing sub-μA static current, wide VCC flexibility, and robustness in harsh environments.
FAQ
What is the maximum input voltage rating for 74AUP2G126GF,115 when VCC = 1.2 V?
The device supports overvoltage-tolerant inputs up to 3.6 V regardless of VCC level. When VCC = 1.2 V, inputs may safely swing from 0 V to 3.6 V without damage or latch-up, enabling direct connection to 3.3 V sensors or microcontrollers without level-shifting circuitry.
Does 74AUP2G126GF,115 support true bidirectional signal buffering?
No - it is a unidirectional non-inverting buffer with fixed input (nA) and output (nY) paths. Each channel has independent active-HIGH output enable (nOE), but no internal direction control or bus transceiver functionality. Bidirectional operation requires external control logic or a dedicated transceiver IC.
How does the IOFF feature behave during power sequencing in multi-rail systems?
When VCC drops to 0 V, the IOFF circuit automatically places both outputs (1Y, 2Y) in high-impedance state and limits OFF-state leakage to ±0.75 μA. This prevents back-driving from live I/O lines into a powered-down domain, protecting downstream circuitry during asymmetric power-up/down sequences.
Can 74AUP2G126GF,115 drive a 50 pF load while maintaining timing specifications?
No - the datasheet characterizes dynamic performance only up to CL = 30 pF. At 50 pF, propagation delay increases beyond guaranteed limits (e.g., >8.3 ns at VCC = 3.6 V), and output rise/fall times degrade. For >30 pF loads, add series termination or select a higher-drive buffer such as 74AUP2G04.
74AUP2G126GF,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 8-XFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 2
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 4mA, 4mA
- Voltage - Supply:
- 0.8V ~ 3.6V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-XSON (1.35x1)
74AUP2G126GF,115 FAQ
1.How can I place an order for 74AUP2G126GF,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP2G126GF,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP2G126GF,115 reliable?
The price and inventory of 74AUP2G126GF,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP2G126GF,115 is usually 5 days.
3.What payment methods are accepted for 74AUP2G126GF,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP2G126GF,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP2G126GF,115?
74AUP2G126GF,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP2G126GF,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP2G126GF,115?
For technical support, including 74AUP2G126GF,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP2G126GF,115 requirements.
6.How does Aetrix verify that 74AUP2G126GF,115 is sourced from the original manufacturer or authorized distributors?
All 74AUP2G126GF,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP2G126GF,115 meets industry standards.
7.What is the process for return or replacement of 74AUP2G126GF,115?
All 74AUP2G126GF,115 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP2G126GF,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP2G126GF,115 part is unused and in its original packaging.
Return procedure for 74AUP2G126GF,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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