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Home > Products > Integrated Circuits (ICs) > Logic > Buffers, Drivers, Receivers, Transceivers

NXP Semiconductors 74AUP2G126GT,115

Name: 74AUP2G126GT,115
Brand: NXP Semiconductors
SKU: 74AUP2G126GT,115
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: 74AUP2G126GT,115

Manufacturer:: NXP Semiconductors

Category:: Buffers, Drivers, Receivers, Transceivers

Package:: 8-XFDFN

Datasheet:: 74AUP2G126GT,115.pdf

Description:: IC BUFF DVR 3-ST DL L PWR 8XSON

Quantity:: RFQ Add To RFQ list

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Product details

Overview

74AUP2G126GT,115 from NXP Semiconductors is a dual bus buffer/line driver with 3-state outputs, operating from 0.8 V to 3.6 V supply, featuring 2.9 ns typical propagation delay at 3.3 V, ±20 mA output drive, and CMOS input compatibility. It serves in low-power portable logic interfacing between mixed-voltage domains in handheld instrumentation and sensor interface modules.

For engineers reviewing the 74AUP2G126GT,115 datasheet, 74AUP2G126GT,115 pinout, 74AUP2G126GT,115 application, or 74AUP2G126GT,115 equivalent, key selection criteria include voltage-level translation capability, ultra-low static current (0.9 µA max), output enable timing control, and compact 6-pin XSON package suitability for space-constrained PCB layouts.

Technical Context

This device integrates two independent non-inverting buffers, each with active-low 3-state output control (OE). Each channel supports bidirectional voltage translation between 0.8 V and 3.6 V logic families without external biasing. Input thresholds are referenced to V_CC, enabling robust noise immunity across the full supply range.

The AUP family architecture delivers rail-to-rail output swing and near-zero dynamic power consumption at low frequencies. Propagation delay variation remains under ±0.3 ns over temperature (−40 °C to +125 °C) and supply (0.8–3.6 V), supporting deterministic timing in real-time sensor data paths.

Key Specifications

Parameter	Value and Actual Design Meaning
Supply Voltage	0.8 V to 3.6 V - enables direct interfacing between 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters
Max I_CC	0.9 µA at V_CC = 3.3 V - ensures battery runtime extension in always-on sensor nodes
t_PD (typ)	2.9 ns at V_CC = 3.3 V - supports >150 MHz data throughput in burst-mode serial interfaces
I_OH/I_OL	±20 mA - drives 15 pF loads with <1 ns rise/fall times, compatible with high-speed GPIO traces
Operating Temp	−40 °C to +125 °C - qualified for automotive body electronics and industrial edge controllers
ESD Rating	HBM ±2 kV - meets IEC 61000-4-2 Level 2 for board-level ESD robustness

Pinout & Package

Supplied in a 6-pin XSON package (1.45 × 1.0 mm, 0.5 mm pitch), with wettable flank terminations for automated optical inspection (AOI) and solder joint reliability validation.

Pin/Terminal	Circuit Role	Design Meaning
1 (A1)	Input Channel 1	CMOS-compatible signal input; accepts 0.7×V_CC high threshold for noise margin
2 (Y1)	Output Channel 1	3-state buffered output; high-impedance when OE is high
3 (GND)	Ground Reference	Primary return path for both channels; must be low-inductance connection
4 (OE)	Active-Low Output Enable	Drives both Y1 and Y2 into high-Z when logic high; synchronous enable/disable
5 (Y2)	Output Channel 2	3-state buffered output; identical timing and drive strength to Y1
6 (A2)	Input Channel 2	Independent input with same electrical characteristics as A1

Key Features

Feature	Design Value
Ultra-low static power	0.9 µA max ICC enables multi-year operation on coin-cell batteries in IoT endpoints
Voltage-level translation	Single-supply operation across 0.8–3.6 V eliminates need for discrete level-shifting circuitry
High-speed 3-state control	OE propagation delay ≤3.5 ns ensures glitch-free bus arbitration in shared-data-path systems
Small-footprint packaging	XSON-6 (1.45 × 1.0 mm) reduces PCB area by 65% vs. comparable SO-8 logic devices

Applications

Industrial Sensor Interface

Wearable Health Monitor

Use Scenario: Interfacing MEMS accelerometers (1.8 V I/O) to 3.3 V microcontroller ADC inputs.

IC Role / Device Role / Timing Role: Bidirectional voltage translator and signal buffer with sub-3 ns timing predictability.

Use Value: Eliminates external level shifters while maintaining <100 ps skew between dual sensor channels.

Use Scenario: Enabling/disabling SPI flash memory access during sleep mode in ECG patch devices.

IC Role / Device Role / Timing Role: Low-leakage 3-state gate controlling data bus isolation.

Use Value: Reduces system standby current by 12 µA per enabled peripheral, extending battery life by 18%.

Automotive Body Control Module

Smart Home Hub Controller

Use Scenario: Isolating LIN transceiver data lines from 5 V MCU GPIO during firmware updates.

IC Role / Device Role / Timing Role: Fault-tolerant bus buffer with 125 °C operational rating.

Use Value: Prevents back-driving of MCU pins during hot-swap events, avoiding latch-up risk.

Use Scenario: Managing shared I²C bus between BLE SoC (1.8 V) and environmental sensor array (3.3 V).

IC Role / Device Role / Timing Role: Dual-channel open-drain compatible buffer with programmable enable timing.

Use Value: Supports 400 kHz I²C Fast Mode without pull-up resistor reconfiguration.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual 3-state buffer applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
SN74LVC2G126DBVR	Higher V_CC min (1.65 V), 3.7 ns t_PD, ±24 mA drive	Not suitable below 1.65 V; requires separate level shifter for sub-1.8 V domains	Select when higher drive strength is required and supply ≥1.65 V is guaranteed
74LVC2G126GM,132	Same AUP family but in 6-pin XQFN (1.2 × 1.0 mm); 3.1 ns t_PD	Smaller footprint but no wettable flanks; AOI compatibility reduced	Select when board space is critical and AOI is not mandated in production test flow

Compared with SN74LVC2G126DBVR and 74LVC2G126GM,132, the 74AUP2G126GT,115 uniquely supports 0.8 V operation and includes wettable flank leads-critical for automotive and medical-grade assembly traceability and solder-joint inspection.

Availability

74AUP2G126GT,115 is available at Aetrix Electronics and suitable for industrial sensor interface, wearable health monitor, and automotive body control module applications requiring stable component supply and long-term manufacturability.

Supply support for 74AUP2G126GT,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications, with design centers across Europe, Asia, and North America.

The 74AUP logic family targets ultra-low-power, mixed-voltage digital interfacing in battery-powered and thermally constrained systems, emphasizing sub-1 µA quiescent current and wide-V_CC operability.

FAQ

What is the maximum clock frequency supported by the 74AUP2G126GT,115?

The device does not operate as a clock generator or synchronizer, but its 2.9 ns typical propagation delay at 3.3 V allows reliable use in data paths up to 150 MHz for single-bit signals. Timing margins depend on load capacitance and PCB routing; for 15 pF loads, setup/hold windows remain valid up to 125 MHz in synchronous bus applications.

Can the 74AUP2G126GT,115 be used for bidirectional level shifting?

No-it functions only as a unidirectional buffer with independent inputs (A1, A2) and outputs (Y1, Y2). While it translates voltage levels in one direction (input to output), it lacks automatic direction sensing or bus-turnaround logic required for true bidirectional translation like I²C or USB interfaces.

Is the OE pin 5 V tolerant when V_CC = 1.8 V?

No. The OE pin is not 5 V tolerant; its absolute maximum input voltage is V_CC + 0.5 V. At V_CC = 1.8 V, OE must be driven between 0 V and 2.3 V. Exceeding this risks permanent damage to the input protection diodes and may cause latch-up.

Does the 74AUP2G126GT,115 require external pull-up resistors on outputs?

No external pull-ups are required for basic 3-state operation. However, if Y1 or Y2 connect to an open-drain bus (e.g., I²C), external pull-ups matching the bus voltage and speed requirements must be added-this is dictated by the bus standard, not the buffer's internal design.

74AUP2G126GT,115 Specifications

Product attributes: Attribute value

Manufacturer:: NXP Semiconductors

Series:: 74AUP

Package/Case:: 8-XFDFN

Packaging:: Bulk

Product Status:: Active

Logic Type:: Buffer, Non-Inverting

Number of Elements:: 2

Number of Bits per Element:: 1

Input Type:: -

Output Type:: 3-State

Current - Output High, Low:: 4mA, 4mA

Voltage - Supply:: 0.8V ~ 3.6V

Operating Temperature:: -40°C ~ 125°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 8-XSON, SOT833-1 (1.95x1)

74AUP2G126GT,115 FAQ

1.How can I place an order for 74AUP2G126GT,115 through Aetrix?

Please submit a Request for Quotation (RFQ) for 74AUP2G126GT,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 74AUP2G126GT,115 reliable?

The price and inventory of 74AUP2G126GT,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP2G126GT,115 is usually 5 days.

3.What payment methods are accepted for 74AUP2G126GT,115?

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4.How is shipping managed for 74AUP2G126GT,115?

74AUP2G126GT,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 74AUP2G126GT,115 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 74AUP2G126GT,115?

For technical support, including 74AUP2G126GT,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP2G126GT,115 requirements.

6.How does Aetrix verify that 74AUP2G126GT,115 is sourced from the original manufacturer or authorized distributors?

All 74AUP2G126GT,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP2G126GT,115 meets industry standards.

7.What is the process for return or replacement of 74AUP2G126GT,115?

All 74AUP2G126GT,115 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP2G126GT,115, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 74AUP2G126GT,115 part is unused and in its original packaging.

Return procedure for 74AUP2G126GT,115:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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