NXP Semiconductors 74AUP2G132GF,115

Overview

74AUP2G132GF,115 from Nexperia is a dual 2-input NAND gate with Schmitt-trigger inputs, designed for noise-immune signal conditioning in ultra-low-power systems operating from 0.8 V to 3.6 V. It features IOFF partial power-down protection, ±0.75 μA max ICC at −40 °C to +125 °C, 1.31 V hysteresis at 3.0 V VCC, and XSON8 (SOT1089) 1.35 × 1.0 × 0.5 mm package. Used in wave shaping and multivibrator circuits where input noise rejection and rail-to-rail compatibility are critical.

For engineers reviewing the 74AUP2G132GF,115 datasheet, 74AUP2G132GF,115 pinout, 74AUP2G132GF,115 application, or 74AUP2G132GF,115 equivalent, key selection criteria include Schmitt-trigger hysteresis voltage (0.79–1.31 V), IOFF leakage (< ±0.75 μA at VCC = 0 V), propagation delay (1.4–6.2 ns at 3.0 V/5 pF), supply range (0.8–3.6 V), and thermal rating (−40 °C to +125 °C).

Technical Context

This device implements two independent NAND logic gates, each with asymmetric Schmitt-trigger input thresholds (VT+ = 1.88–2.32 V, VT− = 0.88–1.24 V at 3.0 V) enabling robust noise margin in slow-rising or noisy digital signals. The IOFF circuit actively disables outputs during power-down, blocking backflow current when VCC = 0 V.

It complies with JEDEC standards JESD8-12 through JESD8C across five VCC ranges and supports ESD protection per JS-001 Class 3A (>5000 V HBM) and JS-002 Class C3 (>1000 V CDM), making it suitable for portable and battery-powered industrial interfaces.

Key Specifications

Pinout & Package

XSON8 package (SOT1089): extremely thin small outline, no leads, 8-terminal surface-mount with body dimensions 1.35 mm × 1.0 mm × 0.5 mm and wettable flank capability.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual Schmitt NAND gate applications.

Compared with SN74LVC2G132DCUR and 74LVC2G132GM,132, the 74AUP2G132GF,115 uniquely supports 0.8 V operation, delivers <1.4 μA ICC over full temperature range, and guarantees IOFF behavior-making it the sole choice for energy-harvesting and automotive body-control modules requiring true partial power-down integrity.

Availability

74AUP2G132GF,115 is available at Aetrix Electronics and suitable for wave shapers, astable/monostable multivibrators, and industrial sensor interfaces requiring stable component supply across extended temperature and ultra-low-power constraints.

Supply support for 74AUP2G132GF,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert delivering high-performance, reliable logic, discrete, and MOSFET solutions with leadership in efficiency and miniaturization.

The 74AUP (Advanced Ultra Low Power) product line targets battery-powered and energy-constrained applications, emphasizing sub-1-μA static current, wide VCC scalability, and robust IOFF functionality for next-generation portable and automotive electronics.

FAQ

What is the minimum VCC required for guaranteed logic operation?

The 74AUP2G132GF,115 is fully specified down to 0.8 V VCC per JEDEC JESD8-12, with functional operation confirmed at VIH = 0.7 × VCC and VIL = 0.3 × VCC across −40 °C to +125 °C. Propagation delay increases to 22.5 ns at 0.8 V/5 pF, but logic truth table remains valid.

Does the IOFF feature require external control signals?

No. IOFF is fully automatic: when VCC drops below approximately 0.2 V, internal circuitry disables both outputs regardless of input states, preventing backflow current without any enable pin or configuration register.

Can this device drive a 50 pF capacitive load reliably?

While characterized up to 30 pF in the datasheet, the 74AUP2G132GF,115 can drive 50 pF with measurable delay increase (estimated +15–20% vs. 30 pF). For timing-critical paths, derating to ≤30 pF is recommended; for non-timing applications like LED drivers, 50 pF is acceptable with verified setup/hold margins.

Is the SOT1089 package compatible with standard XSON8 reflow profiles?

Yes. The SOT1089 (XSON8) package uses standard lead-free reflow profiles per IPC/JEDEC J-STD-020. Peak temperature must not exceed 260 °C for ≤30 seconds, and the thermal pad is not present-no special stencil or underfill is required for assembly.