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Home > Products > Integrated Circuits (ICs) > Logic > Gates and Inverters

NXP Semiconductors 74AUP2G132GM,125

Name: 74AUP2G132GM,125
Brand: NXP Semiconductors
SKU: 74AUP2G132GM,125
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: 74AUP2G132GM,125

Manufacturer:: NXP Semiconductors

Category:: Gates and Inverters

Package:: 8-XFQFN Exposed Pad

Datasheet:: 74AUP2G132GM,125.pdf

Description:: IC GATE NAND 2CH 2-INP 8XQFN

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Product details

Overview

74AUP2G132GM,125 from NXP Semiconductors is a dual 2-input NAND gate with Schmitt-trigger inputs in ultra-low-power CMOS technology, operating from 0.8 V to 3.6 V supply, delivering 3.7 ns propagation delay at 3.3 V and supporting 10 µA static current. It is used in noise-immune digital signal conditioning for sensor interface circuits.

For engineers reviewing the 74AUP2G132GM,125 datasheet, 74AUP2G132GM,125 pinout, 74AUP2G132GM,125 application, or 74AUP2G132GM,125 equivalent, key selection criteria include input hysteresis width (typically 0.3 V), rail-to-rail input compatibility, output drive strength (±4 mA at V_CC = 3.3 V), and guaranteed operation down to 0.8 V for battery-powered logic interfacing.

Technical Context

This device implements two independent NAND gates, each with Schmitt-trigger inputs to reject analog noise on slow or noisy signal lines. The AUP family uses optimized transistor sizing to achieve sub-10 ns propagation delay while maintaining ultra-low static power consumption across the full voltage range.

It supports mixed-voltage interfacing: inputs accept voltages up to V_CC + 0.3 V, and outputs swing rail-to-rail. No external pull-ups are required due to active push-pull outputs, and the device is specified for operation from –40 °C to +125 °C.

Key Specifications

Parameter	Value and Actual Design Meaning
Supply Voltage Range	0.8 V to 3.6 V - Enables direct interface with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters.
Propagation Delay (t_pd)	3.7 ns at V_CC = 3.3 V - Supports >100 MHz toggle rates in clean signal paths with margin.
Input Hysteresis (ΔV_IN)	Typ. 0.3 V at V_CC = 3.3 V - Rejects up to 300 mV of superimposed noise on slow-rising sensor or switch signals.
Output Drive (I_OH/I_OL)	±4 mA at V_CC = 3.3 V - Sufficient to drive 15 pF loads with <5 ns rise/fall times and fan-out of 10 LVTTL loads.
I_CC Static Current	10 µA max at V_CC = 3.3 V - Enables always-on wake-up detection in battery-operated systems with multi-year shelf life.
Operating Temperature	–40 °C to +125 °C - Qualified for under-hood automotive and industrial control environments.

Pinout & Package

Supplied in a 8-pin XSON package (2 mm × 1.2 mm, 0.5 mm pitch) with wettable flanks for automated optical inspection.

Pin/Terminal	Circuit Role	Design Meaning
1	A1 (Input)	First input of Gate 1; Schmitt-trigger threshold rejects noise on mechanical switch or open-collector sensor outputs.
2	B1 (Input)	Second input of Gate 1; enables NAND logic function with hysteresis for robust edge detection.
3	Y1 (Output)	Inverted AND output of Gate 1; push-pull structure ensures fast, rail-to-rail transitions into capacitive loads.
4	GND	Ground reference for all internal circuitry and I/O; must be low-impedance for stable noise immunity.
5	Y2 (Output)	Inverted AND output of Gate 2; electrically isolated from Y1, allowing independent signal conditioning paths.
6	B2 (Input)	Second input of Gate 2; identical electrical behavior to B1, supporting dual-channel parallel processing.
7	A2 (Input)	First input of Gate 2; matches A1 timing and hysteresis, enabling synchronized dual-signal debouncing.
8	V_CC	Positive supply rail; decoupling capacitor (100 nF) required within 3 mm for stable high-speed switching.

Key Features

Feature	Design Value
Schmitt-trigger inputs	Provides 300 mV typical hysteresis to eliminate chatter from slow or noisy switch/sensor inputs.
Rail-to-rail output swing	Ensures full logic-level compatibility across 0.8–3.6 V supply, eliminating need for external level translators.
Ultra-low static power	10 µA max I_CC enables integration into always-on subsystems without compromising battery life.
Wide temperature range	–40 °C to +125 °C operation supports deployment in engine control units and industrial PLC I/O modules.

Applications

Industrial Sensor Interface

Automotive Body Control

Use Scenario: Debouncing mechanical door latch switches exposed to EMI and vibration in vehicle body modules.

IC Role / Device Role / Timing Role: Dual NAND gate with Schmitt inputs performs synchronous signal conditioning and noise rejection before microcontroller GPIO sampling.

Use Value: Eliminates software debouncing overhead and prevents false wake-up events caused by contact bounce or conducted noise.

Use Scenario: Cleaning analog-output thermistor or potentiometer signals feeding HVAC control logic.

IC Role / Device Role / Timing Role: Signal conditioner converting slow-rising analog thresholds into clean digital edges for ADC trigger or comparator enable.

Use Value: Reduces system-level susceptibility to ground bounce and supply ripple without adding RC filters or firmware latency.

Portable Medical Device

Smart Energy Metering

Use Scenario: Interfacing tactile membrane buttons in battery-powered glucose monitors with strict power budgets.

IC Role / Device Role / Timing Role: Low-voltage logic gate providing hardware-level switch debouncing at 1.8 V supply.

Use Value: Extends battery life by replacing CPU polling loops with zero-power hysteresis-based edge detection.

Use Scenario: Conditioning pulse outputs from utility meter flow sensors subject to long cable runs and EFT transients.

IC Role / Device Role / Timing Role: Input buffer with noise immunity ensuring reliable pulse counting under 1 kV EFT stress conditions.

Use Value: Maintains meter accuracy without requiring shielded cabling or additional transient suppression components.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual Schmitt-trigger NAND gate applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
SN74LVC2G132DCUR	Higher I_CC (10 µA vs. 20 µA typ.), wider V_CC range (1.65–5.5 V), no hysteresis spec below 1.65 V.	Not suitable for sub-1.65 V battery operation; requires higher minimum supply.	Select when interfacing with 5 V legacy systems or where higher drive strength (±24 mA) is needed.
74LVC2G132GM,132	Same package and pinout, but standard LVC speed grade (t_pd = 4.4 ns @ 3.3 V) and higher I_CC (20 µA).	Acceptable where 0.7 ns slower delay is tolerable and ultra-low static current is not critical.	Choose for cost-sensitive designs where AUP's 10 µA I_CC advantage is unnecessary.

Compared with SN74LVC2G132DCUR and 74LVC2G132GM,132, the 74AUP2G132GM,125 uniquely delivers sub-10 ns delay with single-digit µA static current and guaranteed Schmitt operation down to 0.8 V-making it optimal for energy-constrained, mixed-voltage sensor front-ends.

Availability

74AUP2G132GM,125 is available at Aetrix Electronics and suitable for industrial sensor interface, automotive body control, and portable medical device applications requiring stable component supply and long-term lifecycle support.

Supply support for 74AUP2G132GM,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.

The 74AUP series targets ultra-low-power, wide-supply digital logic for battery-powered and energy-harvesting systems, emphasizing rail-to-rail operation, noise immunity, and extended temperature reliability.

FAQ

Is the 74AUP2G132GM,125 compatible with 1.2 V logic systems?

Yes. The device is fully specified from 0.8 V to 3.6 V, including guaranteed operation at 1.2 V. At this supply, propagation delay is 9.5 ns (max), input hysteresis remains functional, and output drive meets ±2 mA specifications-enabling direct use with 1.2 V FPGA I/O banks and ultra-low-power MCUs.

Does this part require external pull-up resistors on inputs or outputs?

No. Inputs are Schmitt-trigger with defined thresholds and do not float; outputs are push-pull, not open-drain. External pull-ups are unnecessary for normal NAND logic operation. Pull-ups may only be needed if interfacing with open-collector sources outside the device's specified input voltage range.

What is the maximum capacitive load this device can drive reliably?

The 74AUP2G132GM,125 is characterized driving 15 pF loads with ≤5 ns rise/fall times at V_CC = 3.3 V. Driving >30 pF increases propagation delay nonlinearly and may cause undershoot; for heavier loads, add a series resistor or buffer stage per NXP AN10450 guidelines.

Can this IC be used in automotive applications requiring AEC-Q100 qualification?

No. The 74AUP2G132GM,125 is not AEC-Q100 qualified. For automotive-grade equivalents, consider NXP's automotive-qualified 74AUP2G132GW,125 (AEC-Q100 Grade 2, –40 °C to +105 °C) or the pin-compatible 74AUP2G132GMH,125 variant with extended reliability screening.

74AUP2G132GM,125 Specifications

Product attributes: Attribute value

Manufacturer:: NXP Semiconductors

Series:: 74AUP

Package/Case:: 8-XFQFN Exposed Pad

Packaging:: Bulk

Product Status:: Active

Logic Type:: NAND Gate

Number of Circuits:: 2

Number of Inputs:: 2

Features:: Schmitt Trigger

Voltage - Supply:: 0.8V ~ 3.6V

Current - Quiescent (Max):: 500 nA

Current - Output High, Low:: 4mA, 4mA

Input Logic Level - Low:: 0.1V ~ 0.88V

Input Logic Level - High:: 0.6V ~ 2.29V

Max Propagation Delay @ V, Max CL:: 7.8ns @ 3.3V, 30pF

Operating Temperature:: -40°C ~ 125°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 8-XQFN (1.6x1.6)

74AUP2G132GM,125 FAQ

1.How can I place an order for 74AUP2G132GM,125 through Aetrix?

Please submit a Request for Quotation (RFQ) for 74AUP2G132GM,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 74AUP2G132GM,125 reliable?

The price and inventory of 74AUP2G132GM,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP2G132GM,125 is usually 5 days.

3.What payment methods are accepted for 74AUP2G132GM,125?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP2G132GM,125 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for 74AUP2G132GM,125?

74AUP2G132GM,125 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 74AUP2G132GM,125 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 74AUP2G132GM,125?

For technical support, including 74AUP2G132GM,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP2G132GM,125 requirements.

6.How does Aetrix verify that 74AUP2G132GM,125 is sourced from the original manufacturer or authorized distributors?

All 74AUP2G132GM,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP2G132GM,125 meets industry standards.

7.What is the process for return or replacement of 74AUP2G132GM,125?

All 74AUP2G132GM,125 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP2G132GM,125, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 74AUP2G132GM,125 part is unused and in its original packaging.

Return procedure for 74AUP2G132GM,125:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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