Nexperia USA Inc. 74AUP2G132GXX

Overview

74AUP2G132 from Nexperia is a dual 2-input NAND gate with Schmitt-trigger inputs, designed for noise-immune signal conditioning in low-voltage digital systems. It operates across 0.8 V to 3.6 V supply, delivers ≤0.9 μA max ICC at 125 °C, features IOFF partial power-down protection, and supports −40 °C to +125 °C ambient operation - enabling robust use in battery-powered sensor interfaces and industrial control logic.

For engineers reviewing the 74AUP2G132 datasheet, 74AUP2G132 pinout, 74AUP2G132 application, or 74AUP2G132 equivalent, key selection criteria include Schmitt-trigger hysteresis (up to 1.31 V at 3.0 V), propagation delay as low as 1.4 ns (VCC = 3.0 V, CL = 5 pF), IOFF leakage < ±0.75 μA, overvoltage-tolerant inputs to 3.6 V, and compatibility with JEDEC standards JESD8-12 through JESD8C.

Technical Context

This device integrates two independent NAND gates, each with hysteresis-enabled Schmitt-trigger inputs to reject analog noise on slow-rising/falling signals. Its IOFF circuit actively disables outputs during partial power-down, blocking backflow current when VCC = 0 V while inputs/outputs remain biased up to 3.6 V.

Logic behavior follows standard NAND truth table with hysteresis thresholds VT+ (e.g., 2.29 V typ at VCC = 3.0 V) and VT− (e.g., 1.24 V typ), yielding VH = 1.05 V typical hysteresis. Dynamic performance is characterized by CL-dependent tpd (1.4–10.1 ns across 5–30 pF loads) and CPD = 4.4 pF at VCC = 3.6 V.

Key Specifications

Pinout & Package

74AUP2G132 is available in multiple ultra-compact packages: VSSOP8 (SOT765-1), XSON8 variants (SOT833-1, SOT1089, SOT1116, SOT1203), and thermal-enhanced X2SON8 (SOT1233-2). All share identical 8-terminal pinout mapping per functional role.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual 2-input NAND Schmitt trigger applications.

Compared with SN74LVC2G132DCUR and obsolete 74LVC2G132GM, the 74AUP2G132 uniquely combines ultra-low ICC (<1.4 μA), guaranteed IOFF, and 0.8 V minimum VCC - making it the only option for energy-critical, mixed-voltage, or hot-pluggable applications.

Availability

74AUP2G132 is available at Aetrix Electronics and suitable for wave shapers, astable multivibrators, monostable multivibrators, and industrial input conditioning requiring stable component supply across automotive, medical, and industrial end equipment.

Supply support for 74AUP2G132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a leading semiconductor manufacturer specializing in high-performance, energy-efficient logic, discrete, and MOSFET solutions for automotive, industrial, and consumer markets.

The 74AUP (Advanced Ultra-low Power) logic family targets battery-operated and thermally constrained applications where nanowatt static power and robust noise immunity are critical design requirements.

FAQ

What is the minimum supply voltage for guaranteed operation?

The 74AUP2G132 is fully specified from 0.8 V to 3.6 V. At 0.8 V, it maintains functional logic behavior with propagation delay up to 22.5 ns (CL = 5 pF) and VOH ≥ VCC − 0.11 V. This enables direct integration with sub-1 V microcontrollers and energy-harvesting systems.

How does the IOFF feature protect the device during partial power-down?

When VCC = 0 V, the IOFF circuit disables both outputs (1Y and 2Y), presenting high-impedance states that block current flow from powered inputs or outputs into the unpowered IC. Measured IOFF leakage is ≤±0.75 μA, preventing latch-up and backfeed damage in modular systems.

Can 74AUP2G132 drive a 15 pF load at 3.3 V with sub-5 ns delay?

Yes. At VCC = 3.3 V (within 3.0–3.6 V range) and CL = 15 pF, the maximum tpd is 6.1 ns (−40 °C to +125 °C), well within sub-5 ns requirement. For tighter margins, derate using typical 3.9 ns value at 25 °C or select lower-CL layouts.

Is the Schmitt-trigger hysteresis adjustable or fixed?

Hysteresis is fixed and process-defined: VH = VT+ − VT− ranges from 0.07 V (VCC = 0.8 V) to 1.31 V (VCC = 3.0 V). Thresholds scale with VCC but are not user-adjustable; design must accommodate specified VT+ (e.g., 2.29 V) and VT− (e.g., 1.24 V) at target supply.