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Nexperia USA Inc. 74AUP2G14GM,115
- Part No.:
- 74AUP2G14GM,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Gates and Inverters
- Package:
- 6-XFDFN
- Datasheet:
-
74AUP2G14GM,115.pdf
- Description:
- IC INVERT SCHMITT 2CH 2INP 6XSON
- Quantity:
- Payment:
- Shipping:
Inventory:9,369
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Product details
Overview
74AUP2G14GM,115 from Nexperia is a dual CMOS Schmitt-trigger inverter in XSON6 (SOT886) package, operating from 0.8 V to 3.6 V supply. It delivers ultra-low static current (≤1.4 μA at −40 °C to +125 °C), IOFF-enabled partial power-down protection, and hysteresis-based noise immunity (VH = 0.79–1.31 V at VCC = 3.0 V). It is used in wave shaping and relaxation oscillator circuits in battery-powered IoT sensor nodes.
For engineers reviewing the 74AUP2G14GM,115 datasheet, 74AUP2G14GM,115 pinout, 74AUP2G14GM,115 application, or 74AUP2G14GM,115 equivalent, key selection criteria include supply voltage flexibility (0.8–3.6 V), guaranteed Schmitt-trigger thresholds across temperature, IOFF leakage (<±0.75 μA at VCC = 0 V), propagation delay ≤4.0 ns (VCC = 3.0 V, CL = 5 pF), and XSON6 thermal performance (derating slope 3.3 mW/K above 74 °C).
Technical Context
This device implements two independent Schmitt-trigger inverters with asymmetric input thresholds (VT+ = 1.88–2.32 V, VT− = 0.88–1.24 V at VCC = 3.0 V), enabling robust signal conditioning of slow-rising or noisy inputs. Its IOFF circuit actively disables outputs during power-down, blocking backflow current when VCC = 0 V.
Designed for low-voltage mixed-signal systems, it complies with JEDEC standards JESD8-12 through JESD8-B and supports operation from −40 °C to +125 °C. Input overvoltage tolerance to 3.6 V allows interfacing with higher-voltage logic without level shifters.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 0.8 V to 3.6 V - Enables direct interface with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without regulators. |
| Max ICC (Static) | 1.4 μA at −40 °C to +125 °C - Ensures <1.5 μA quiescent draw in always-on sensor wake-up circuits. |
| Hysteresis Voltage (VH) | 0.79–1.31 V at VCC = 3.0 V - Provides ≥400 mV noise margin against EMI-induced false triggering in industrial environments. |
| Propagation Delay | 1.5–4.0 ns (VCC = 3.0 V, CL = 5 pF) - Supports >200 MHz clock edge detection in timing-critical waveform reconstruction. |
| IOFF Leakage | ±0.75 μA at VCC = 0 V - Prevents >0.75 μA backfeed into powered subsystems during partial shutdown. |
| Input Overvoltage Tolerance | 3.6 V absolute max - Allows safe connection to 3.3 V I/O even when 74AUP2G14GM,115 is supplied at 1.8 V. |
| ESD Rating (HBM) | 5000 V - Meets IEC 61000-4-2 Level 4 for board-level surge immunity in handheld devices. |
Pinout & Package
XSON6 plastic extremely thin small outline package (SOT886); no leads; 6 terminals; body dimensions 1.0 × 1.45 × 0.5 mm; thermal pad exposed on bottom; pin 1 index located on lower-left corner below marking code "pK".
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | 1A | First inverter input - accepts Schmitt-triggered signals with VT+ / VT− hysteresis. |
| 2 | GND | Digital ground reference - must be low-impedance return path for both inverters and IOFF control. |
| 3 | 2A | Second inverter input - electrically isolated from 1A; enables dual independent signal conditioning. |
| 4 | 2Y | Second inverter output - active-drive complementary to 2A; supports 4 mA sink/source at VCC = 3.0 V. |
| 5 | VCC | Supply voltage input - powers both inverters and IOFF circuitry; decoupling capacitor required within 2 mm. |
| 6 | 1Y | First inverter output - inverted, hysteresis-shaped replica of 1A; shares same drive strength as 2Y. |
Key Features
| Feature | Design Value |
|---|---|
| Wide VCC range | 0.8 V to 3.6 V - Eliminates need for separate voltage translators in multi-rail embedded systems. |
| IOFF partial power-down | Active output disable at VCC = 0 V - Prevents back-current damage when one subsystem powers down while others remain active. |
| High noise immunity | VH ≥ 0.79 V at VCC = 3.0 V - Rejects >790 mV of common-mode noise on sensor or switch inputs without oscillation. |
| Low dynamic power | CPD = 4.3 pF at VCC = 3.0 V - Limits switching power to <40 μW at 1 MHz with 15 pF load, critical for energy harvesting designs. |
| Overvoltage-tolerant inputs | VI max = 3.6 V - Permits direct connection to 3.3 V GPIOs while operating at 1.2 V supply, reducing BOM count. |
Applications
| Wave Shaping | Astable Multivibrator |
|---|---|
|
Use Scenario: Converting slow-rising analog sensor outputs (e.g., thermistor RC decay) into clean digital edges for microcontroller wake-up interrupts. IC Role / Device Role / Timing Role: Dual Schmitt-trigger inverter providing threshold-based signal squaring and noise rejection before MCU input capture. Use Value: Eliminates external RC filters and comparator ICs; reduces component count by two parts per channel in compact wearables. |
Use Scenario: Generating precise square-wave clocks for low-power real-time clocks or LED blink patterns in portable medical devices. IC Role / Device Role / Timing Role: Cross-coupled inverter pair forming self-oscillating relaxation oscillator with R/C timing network. Use Value: Achieves <1% frequency drift over −40 °C to +125 °C using only two passive components-no crystal or external timer IC needed. |
| Monostable Multivibrator | Power Sequencing Monitor |
|
Use Scenario: Creating fixed-duration pulses from momentary push-button presses in battery-operated remote controls. IC Role / Device Role / Timing Role: Single inverter stage with RC feedback generating stable pulse width independent of supply variation. Use Value: Delivers consistent 100 ms debounced output across full 0.8–3.6 V VCC range-no recalibration required during battery discharge. |
Use Scenario: Validating correct power rail sequencing in FPGA or SoC carrier boards before enabling downstream logic. IC Role / Device Role / Timing Role: Inverter monitoring delayed enable signal to generate synchronized reset pulse with hysteresis margin. Use Value: Prevents metastability in multi-rail systems by ensuring >200 mV noise margin between rail detection thresholds. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual Schmitt-trigger inverter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC2G14DBVR | Higher ICC (max 10 μA), wider VCC (1.65–5.5 V), no IOFF, SOT-23-6 package (larger footprint) | Not suitable for partial power-down systems; requires level-shifting above 3.6 V | Select when interfacing with 5 V logic and IOFF is not required. |
| 74LVC2G14GW,125 | Same SOT363-2 (TSSOP6) package; identical VCC range; IOFF supported; but higher max ICC (2.5 μA) and larger body (1.25 mm width) | Less space-constrained PCBs; slightly higher leakage in always-on mode | Select when board layout permits TSSOP6 and thermal derating margin exceeds 3.7 mW/K. |
Compared with SN74LVC2G14DBVR and 74LVC2G14GW,125, the 74AUP2G14GM,115 offers the lowest static current (1.4 μA vs. 2.5–10 μA), smallest footprint (XSON6 vs. SOT-23/TSSOP6), and tighter thermal derating (3.3 mW/K), making it optimal for ultra-low-power, space-constrained edge-node designs.
Availability
74AUP2G14GM,115 is available at Aetrix Electronics and suitable for battery-powered IoT sensors, wearable health monitors, and automotive body-control modules requiring stable component supply across extended temperature ranges.
Supply support for 74AUP2G14GM,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, discrete, and MOSFET solutions, serving automotive, industrial, and consumer markets with ISO/TS 16949-certified manufacturing.
The 74AUP (Advanced Ultra-low Power) logic family targets energy-constrained applications such as coin-cell-powered sensors and always-on edge devices, emphasizing sub-μA static current and wide-voltage interoperability.
FAQ
What is the maximum allowable input voltage when VCC = 1.2 V?
The absolute maximum input voltage is 3.6 V regardless of VCC level, as specified in Table 5. This overvoltage tolerance allows the 74AUP2G14GM,115 to safely accept 3.3 V signals while operating at 1.2 V supply, eliminating external level shifters in mixed-voltage interfaces.
Does the IOFF feature require external control signals?
No. IOFF is fully automatic and activated when VCC drops to 0 V. The internal circuitry disables both outputs (1Y and 2Y) to prevent back-current flow, requiring no external enable/disable pins or configuration-ideal for unattended power sequencing.
How does hysteresis improve performance in noisy environments?
Hysteresis provides distinct VT+ (1.88–2.32 V) and VT− (0.88–1.24 V) thresholds at VCC = 3.0 V, creating a 0.79–1.31 V noise margin. This prevents multiple toggles on slowly varying or EMI-corrupted inputs-critical for reliable switch debouncing and sensor signal conditioning.
Can this device drive a 50 pF capacitive load reliably?
Yes. While typical propagation delay increases to ~7.4 ns at CL = 30 pF and VCC = 3.0 V, the output driver maintains VOL ≤ 0.50 V and VOH ≥ 2.30 V under 4 mA load. For 50 pF, add series termination or reduce edge rate to maintain signal integrity without violating DC specs.
74AUP2G14GM,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 6-XFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Inverter
- Number of Circuits:
- 2
- Number of Inputs:
- 2
- Features:
- Schmitt Trigger
- Voltage - Supply:
- 0.8V ~ 3.6V
- Current - Quiescent (Max):
- 500 nA
- Current - Output High, Low:
- 4mA, 4mA
- Input Logic Level - Low:
- 0.1V ~ 0.88V
- Input Logic Level - High:
- 0.6V ~ 2.29V
- Max Propagation Delay @ V, Max CL:
- 6.1ns @ 3.3V, 30pF
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-XSON, SOT886 (1.45x1)
74AUP2G14GM,115 FAQ
1.How can I place an order for 74AUP2G14GM,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP2G14GM,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP2G14GM,115 reliable?
The price and inventory of 74AUP2G14GM,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP2G14GM,115 is usually 5 days.
3.What payment methods are accepted for 74AUP2G14GM,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP2G14GM,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP2G14GM,115?
74AUP2G14GM,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP2G14GM,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP2G14GM,115?
For technical support, including 74AUP2G14GM,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP2G14GM,115 requirements.
6.How does Aetrix verify that 74AUP2G14GM,115 is sourced from the original manufacturer or authorized distributors?
All 74AUP2G14GM,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP2G14GM,115 meets industry standards.
7.What is the process for return or replacement of 74AUP2G14GM,115?
All 74AUP2G14GM,115 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP2G14GM,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP2G14GM,115 part is unused and in its original packaging.
Return procedure for 74AUP2G14GM,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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