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Nexperia USA Inc. 74AUP2G14GW,125
- Part No.:
- 74AUP2G14GW,125
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Gates and Inverters
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
74AUP2G14GW,125.pdf
- Description:
- IC INVERT SCHMITT 2CH 2IN 6TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:6,016
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Product details
Overview
74AUP2G14GW,125 from Nexperia is a dual Schmitt-trigger inverter IC designed for signal conditioning in ultra-low-power systems. It operates across 0.8 V to 3.6 V supply, delivers ≤0.9 μA max ICC at −40 °C to +125 °C, features IOFF partial power-down protection, and uses TSSOP6 (SOT363-2) packaging. It enables robust waveform shaping in battery-powered sensor interfaces and timing circuits.
For engineers reviewing the 74AUP2G14GW,125 datasheet, 74AUP2G14GW,125 pinout, 74AUP2G14GW,125 application, or 74AUP2G14GW,125 equivalent, key selection criteria include its Schmitt-trigger hysteresis (0.79–1.31 V at 3.0 V), propagation delay as low as 1.5 ns (VCC = 3.0 V, CL = 5 pF), IOFF leakage < ±0.75 μA, and −40 °C to +125 °C industrial temperature rating.
Technical Context
The 74AUP2G14GW,125 implements two independent CMOS inverters with Schmitt-trigger inputs, providing noise-immune signal restoration via input hysteresis (VH = 0.79–1.31 V at VCC = 3.0 V). Its IOFF circuit actively disables outputs during power-down, blocking backflow current when VCC = 0 V.
It complies with JEDEC standards JESD8-12 through JESD8-B across five voltage bands and supports overvoltage-tolerant inputs up to 3.6 V regardless of VCC level. Dynamic performance is characterized with CL = 5–30 pF loads and propagation delays specified down to 1.5 ns at 3.0 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 0.8 V to 3.6 V - Enables direct interfacing with 0.9 V, 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters. |
| Max ICC (−40 °C to +125 °C) | 1.4 μA - Ensures sub-microwatt static power in always-on monitoring nodes and energy-harvesting systems. |
| Hysteresis Voltage (VH) | 0.79–1.31 V at VCC = 3.0 V - Provides ≥400 mV noise margin for slow-rising signals in noisy industrial environments. |
| Propagation Delay (tpd) | 1.5 ns min / 4.0 ns max at VCC = 3.0 V, CL = 5 pF - Supports >200 MHz clock edge detection in timing-critical oscillator feedback paths. |
| IOFF Leakage Current | ±0.75 μA at VCC = 0 V - Prevents cross-conduction and bus contention in hot-swap or multi-rail partial-power-down architectures. |
| Input Overvoltage Tolerance | 3.6 V absolute max - Allows safe connection to 3.3 V buses even when VCC = 0.8 V or unpowered. |
| ESD Rating (HBM) | 5000 V - Meets IEC 61000-4-2 Level 4 system-level ESD immunity requirements without external protection. |
Pinout & Package
TSSOP6 plastic thin shrink small outline package (SOT363-2); 6 leads; body width 1.25 mm; lead pitch 0.65 mm; moisture sensitivity level MSL3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | 1A - Input A of first inverter | Accepts Schmitt-triggered digital input; referenced to GND; tolerant to 3.6 V regardless of VCC. |
| 2 | GND - Ground reference | Primary return path for all internal currents; must be low-impedance to minimize ground bounce in high-speed switching. |
| 3 | 2A - Input A of second inverter | Independent Schmitt-trigger input; electrically isolated from 1A; shares same VCC and GND rails. |
| 4 | 2Y - Output Y of second inverter | Inverted, buffered output with rail-to-rail swing; drives capacitive loads up to 30 pF with guaranteed timing. |
| 5 | VCC - Supply voltage | Single-supply input powering both inverters; IOFF activates automatically when VCC = 0 V. |
| 6 | 1Y - Output Y of first inverter | CMOS-compatible output; sinks/sourcing ±4 mA at VCC = 3.0 V; supports fan-out of ≥10 74AUP loads. |
Key Features
| Feature | Design Value |
|---|---|
| Wide VCC range (0.8 V–3.6 V) | Enables single-part support across multiple voltage domains in mixed-supply SoC peripherals and IoT sensor hubs. |
| IOFF partial power-down | Prevents damaging backflow current during board-level power sequencing or sleep-mode isolation of subsystems. |
| High noise immunity | Guaranteed 400+ mV hysteresis at 3.3 V ensures reliable operation in motor-drive or RF-adjacent PCB layouts. |
| Low dynamic power dissipation | CPD = 4.3 pF at 3.3 V enables <1 μW dynamic power at 1 MHz with 10 pF load - critical for coin-cell lifetime extension. |
| −40 °C to +125 °C operation | Validated performance across full automotive under-hood and industrial control ambient ranges without derating. |
Applications
| Waveform Shaping | Astable Multivibrator |
|---|---|
|
Use Scenario: Cleaning noisy analog sensor outputs (e.g., thermistor or hall-effect signals) before ADC sampling in portable medical devices. IC Role / Device Role / Timing Role: Dual Schmitt-trigger inverter acting as noise-filtering front-end stage with adjustable hysteresis via external RC. Use Value: Eliminates false triggers caused by EMI-induced glitches, reducing firmware debounce overhead and improving measurement repeatability. |
Use Scenario: Generating precise square-wave clocks for LED dimming or ultrasonic transducer drivers in smart lighting systems. IC Role / Device Role / Timing Role: Cross-coupled inverter pair forming relaxation oscillator with stable frequency set by R and C. Use Value: Delivers jitter-free 10–100 kHz clocks without external crystal or dedicated timer IC, cutting BOM cost and board area. |
| Monostable Multivibrator | Power Sequencing Control |
|
Use Scenario: Creating fixed-duration enable pulses for DC-DC converters during cold-start sequences in automotive infotainment head units. IC Role / Device Role / Timing Role: One inverter configured as edge-triggered monostable using RC time constant on input. Use Value: Guarantees minimum 100 ms power-good assertion window independent of MCU boot timing, preventing brownout lockup. |
Use Scenario: Enabling/disabling auxiliary rails (e.g., camera ISP or RF module) only after main SoC voltage stabilizes in wearable electronics. IC Role / Device Role / Timing Role: Inverter used as level-shifting gate between 1.2 V domain (SoC GPIO) and 3.3 V enable line (PMIC). Use Value: Leverages overvoltage-tolerant inputs to accept 1.2 V control signal while driving 3.3 V load - no level shifter required. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual Schmitt-trigger inverter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC2G14DBVR | Wider VCC range (1.65–5.5 V); higher ICC (max 10 μA); no IOFF; 5.5 V absolute max input. | Requires external series resistor for 3.3 V inputs when VCC = 1.8 V; unsuitable for true zero-VCC isolation. | Select when interfacing legacy 5 V logic or needing higher drive strength; avoid where partial power-down is mandatory. |
| 74LVC2G14GW,125 | Same SOT363-2 package; higher ICC (max 10 μA); no IOFF; lower hysteresis (≈0.3 V at 3.3 V). | Lacks IOFF and reduced noise margin limits use in hot-plug or mixed-voltage backplane designs. | Choose for cost-sensitive consumer applications where full industrial temp range and ultra-low ICC are not required. |
Compared with SN74LVC2G14DBVR and 74LVC2G14GW,125, the 74AUP2G14GW,125 uniquely combines sub-μA static current, guaranteed IOFF, and 0.8 V operation - making it the only option for energy-constrained, multi-rail, wide-temperature embedded systems requiring fail-safe power sequencing.
Availability
74AUP2G14GW,125 is available at Aetrix Electronics and suitable for battery-powered sensor nodes, automotive body-control modules, and industrial PLC I/O conditioning requiring stable component supply across extended temperature and low-power constraints.
Supply support for 74AUP2G14GW,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on essential efficiency-enhancing components, delivering high-performance, reliable, and sustainable solutions for automotive, industrial, and consumer markets.
The 74AUP (Advanced Ultra-low Power) logic family targets ultra-low-power digital signal conditioning in space- and energy-constrained applications, emphasizing sub-1 μA static current, wide VCC scalability, and robust IOFF behavior.
FAQ
What is the maximum operating frequency supported by the 74AUP2G14GW,125?
The device does not specify a maximum clock frequency, but its propagation delay is 1.5–4.0 ns (VCC = 3.0 V, CL = 5 pF), supporting reliable edge detection up to ~200 MHz in oscillator or pulse-stretching configurations. Actual usable frequency depends on load capacitance and input slew rate.
Can the 74AUP2G14GW,125 be used with a 0.9 V supply?
Yes - it is fully specified from 0.8 V to 3.6 V per JEDEC JESD8-12. At 0.9 V, VOH is guaranteed ≥0.7 × VCC (≥0.63 V), VOL ≤0.3 × VCC (≤0.27 V), and tpd ≤11.1 ns (CL = 5 pF), enabling interoperability with other 0.9 V logic families.
Does the IOFF feature require external control signals?
No - IOFF is fully automatic and requires no external enable/disable pins. When VCC drops to 0 V, the internal circuitry disables both outputs, limiting leakage to ±0.75 μA regardless of input/output voltage levels (0–3.6 V).
How does the Schmitt-trigger hysteresis improve reliability in noisy environments?
Hysteresis creates distinct high-to-low (VT−) and low-to-high (VT+) thresholds - e.g., 0.88 V and 2.29 V at VCC = 3.0 V - resulting in 1.41 V noise margin. This prevents multiple toggles on slow or noisy edges, eliminating contact bounce artifacts and EMI-induced metastability.
74AUP2G14GW,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Inverter
- Number of Circuits:
- 2
- Number of Inputs:
- 2
- Features:
- Schmitt Trigger
- Voltage - Supply:
- 0.8V ~ 3.6V
- Current - Quiescent (Max):
- 500 nA
- Current - Output High, Low:
- 4mA, 4mA
- Input Logic Level - Low:
- 0.1V ~ 0.88V
- Input Logic Level - High:
- 0.6V ~ 2.29V
- Max Propagation Delay @ V, Max CL:
- 6.1ns @ 3.3V, 30pF
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSSOP
74AUP2G14GW,125 FAQ
1.How can I place an order for 74AUP2G14GW,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP2G14GW,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP2G14GW,125 reliable?
The price and inventory of 74AUP2G14GW,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP2G14GW,125 is usually 5 days.
3.What payment methods are accepted for 74AUP2G14GW,125?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP2G14GW,125 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP2G14GW,125?
74AUP2G14GW,125 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP2G14GW,125 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP2G14GW,125?
For technical support, including 74AUP2G14GW,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP2G14GW,125 requirements.
6.How does Aetrix verify that 74AUP2G14GW,125 is sourced from the original manufacturer or authorized distributors?
All 74AUP2G14GW,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP2G14GW,125 meets industry standards.
7.What is the process for return or replacement of 74AUP2G14GW,125?
All 74AUP2G14GW,125 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP2G14GW,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP2G14GW,125 part is unused and in its original packaging.
Return procedure for 74AUP2G14GW,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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