Nexperia USA Inc. 74AUP2G241GN,115
- Part No.:
- 74AUP2G241GN,115
- Manufacturer:
- Nexperia USA Inc.
- Package:
- 8-XFDFN
- Datasheet:
-
74AUP2G241GN,115.pdf
- Description:
- IC BUFFER NON-INVERT 3.6V 8XSON
- Quantity:
- Payment:

- Shipping:

Inventory:90,000
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Product details
Overview
74AUP2G241GN,115 from Nexperia is a dual non-inverting 3-state buffer/line driver in XSON8 (SOT1116) package, operating from 0.8 V to 3.6 V supply. It features independent active-low and active-high output enables (1OE, 2OE), Schmitt-trigger inputs for noise immunity, IOFF circuitry for partial power-down protection, and input-disable functionality. Used in low-power I/O expansion, bus isolation, and level-translating signal routing in portable and battery-powered systems.
For engineers reviewing the 74AUP2G241GN,115 datasheet, 74AUP2G241GN,115 pinout, 74AUP2G241GN,115 application, or 74AUP2G241GN,115 equivalent, key selection criteria include its ultra-low ICC (≤1.4 μA max), dual asymmetric enable logic (1OE active LOW, 2OE active HIGH), guaranteed operation at −40 °C to +125 °C, and compatibility with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains.
Technical Context
This device implements two independent non-inverting buffers with high-impedance 3-state outputs controlled by separate enable inputs: 1OE (active LOW) and 2OE (active HIGH). Schmitt-trigger inputs ensure robust operation across slow-rising/falling signals and full VCC range (0.8–3.6 V).
The IOFF circuit prevents backflow current during partial power-down, while input-disable behavior (1A disabled when 1OE = HIGH; 2A disabled when 2OE = LOW) eliminates floating-input leakage. All static and dynamic parameters are fully specified over −40 °C to +125 °C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 0.8 V to 3.6 V - supports single-supply operation across 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic families without level shifters. |
| Max ICC (Static) | 1.4 μA at −40 °C to +125 °C - enables multi-year battery life in always-on sensor nodes and wearables. |
| Propagation Delay | 1.4 ns (typ) at VCC = 3.3 V, CL = 5 pF - ensures timing-critical signal buffering with sub-nanosecond margin. |
| IOFF Leakage | ±0.75 μA max at VCC = 0 V - blocks damaging back-current when one side of a bus is powered down. |
| Input Thresholds | VIL ≤ 0.30×VCC, VIH ≥ 0.70×VCC at VCC = 0.8 V - guarantees reliable switching even under voltage droop or noise. |
| ESD Protection | HBM > 5000 V, CDM > 1000 V - meets industrial handling requirements without external protection diodes. |
| Operating Temperature | −40 °C to +125 °C - qualified for under-hood automotive, industrial control, and extended-range IoT edge devices. |
Pinout & Package
XSON8 package (SOT1116): extremely thin small outline, no leads, 8-terminal surface-mount, body size 1.2 mm × 1.0 mm × 0.35 mm, wettable flank compatible.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | 1Y | Non-inverting buffered output for channel 1; enters high-impedance state when 1OE = HIGH. |
| 2 | 2OE | Active-HIGH output enable for channel 2; drives 2Y to Z when HIGH. |
| 3 | VCC | Positive supply rail; decoupling capacitor required within 2 mm for stable low-noise operation. |
| 4 | 2A | Data input for channel 2; disabled (high-impedance) when 2OE = LOW. |
| 5 | 2Y | Non-inverting buffered output for channel 2; enters high-impedance state when 2OE = LOW. |
| 6 | 1A | Data input for channel 1; disabled (high-impedance) when 1OE = HIGH. |
| 7 | 1OE | Active-LOW output enable for channel 1; drives 1Y to Z when HIGH. |
| 8 | GND | Ground reference; must be connected to lowest-impedance PCB ground plane for EMI suppression. |
Key Features
| Feature | Design Value |
|---|---|
| Asymmetric Enable Logic | 1OE active LOW + 2OE active HIGH allows independent control of two bus segments with complementary enable signaling. |
| Input-Disable Function | Inputs 1A and 2A are internally disconnected when their respective OE pins disable the output - eliminates floating-input leakage and reduces system power. |
| Wide-Voltage Schmitt Trigger | Input hysteresis ≥ 0.1×VCC across 0.8–3.6 V ensures noise margins >150 mV at 1.8 V and >300 mV at 3.3 V. |
| IOFF Partial Power-Down | Blocks bidirectional current flow between powered/unpowered sections - critical for hot-swap and domain-isolation designs. |
| Ultra-Low Dynamic Power | CPD = 4.2 pF at VCC = 3.3 V enables <1 μW dynamic dissipation at 1 MHz with 10 pF load - ideal for duty-cycled sensors. |
Applications
| USB-C Port Multiplexing | Automotive Body Control Module |
|---|---|
|
Use Scenario: Isolating USB-C CC line and sideband use (SBU) signals between host and peripheral during plug insertion/removal. IC Role / Device Role / Timing Role: Dual-channel 3-state buffer routes CC/SBU signals only when port is actively negotiated; disables both paths during disconnect. Use Value: Prevents signal contention and ESD injection into unpowered PHY; IOFF blocks backfeed from Type-C VCONN into dormant MCU I/O banks. |
Use Scenario: Level-shifting and isolating LIN bus wake-up signals and sensor data lines between 5 V microcontroller and 3.3 V transceiver/sensor subsystems. IC Role / Device Role / Timing Role: Buffers wake-up pulses from LIN transceiver to MCU while blocking reverse current during MCU sleep mode (VCC = 0 V). Use Value: Enables true zero-power sleep states; Schmitt inputs tolerate noisy vehicle electrical environment; −40 °C to +125 °C rating matches under-dash thermal profile. |
| Industrial PLC I/O Expansion | Medical Wearable Sensor Hub |
|
Use Scenario: Adding isolated digital I/O channels to modular PLC backplanes where multiple voltage domains coexist (e.g., 24 V field side, 3.3 V controller side). IC Role / Device Role / Timing Role: Acts as bi-directional bus buffer between FPGA-configured I/O banks and external optocoupled modules; enables/disables per channel via FPGA GPIO. Use Value: Eliminates need for discrete level shifters and pull-ups; input-disable prevents leakage-induced false triggers on unused channels during reconfiguration. |
Use Scenario: Aggregating analog sensor outputs (ECG, SpO₂, temperature) into a low-power MCU with shared ADC input multiplexer. IC Role / Device Role / Timing Role: Buffers sensor analog front-end outputs to prevent loading; 3-state outputs allow time-multiplexed sampling without crosstalk. Use Value: Ultra-low ICC (≤1.4 μA) extends coin-cell battery life beyond 3 years; 0.8 V minimum VCC supports brown-out operation during deep discharge. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual 3-state buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 74LVC2G241GW,125 | Higher ICC (max 40 μA), wider VCC (1.65–5.5 V), no IOFF, no input-disable, same SOT363 package. | Limited to 1.8 V+ systems; unsuitable for partial power-down or ultra-low-power sleep modes. | Select when interfacing legacy 5 V peripherals and higher drive strength (24 mA) is required. |
| SN74AUP2G241DSGR | Identical electrical specs and pinout; TI version in WSON8 (same footprint as SOT1116); identical −40 °C to +125 °C rating. | No functional difference; qualifies as second-source for supply chain diversification. | Select for dual-sourcing assurance without redesign; verify TI's qualification report for automotive AEC-Q100 Grade 1 compliance. |
Compared with 74LVC2G241GW,125, the 74AUP2G241GN,115 delivers 30× lower static power and IOFF protection essential for battery longevity and hot-swap safety; versus SN74AUP2G241DSGR, it offers identical performance with Nexperia's proven reliability in high-volume industrial production.
Availability
74AUP2G241GN,115 is available at Aetrix Electronics and suitable for USB-C interface design, automotive body electronics, and industrial PLC I/O expansion requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for 74AUP2G241GN,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, discrete, and MOSFET solutions for automotive, industrial, and consumer markets.
The 74AUP (Advanced Ultra-low Power) logic family targets energy-constrained applications demanding sub-microamp static current, wide VCC flexibility, and robustness across harsh environments.
FAQ
What is the function of the asymmetric enable inputs (1OE active LOW, 2OE active HIGH)?
This configuration allows independent control of two bus segments using complementary logic levels - for example, enabling one channel with a processor's active-LOW chip select while using an active-HIGH signal from a status register to enable the second. It avoids external inverters and simplifies FPGA or MCU GPIO allocation in space-constrained designs.
Can 74AUP2G241GN,115 operate reliably at 0.8 V supply?
Yes - all specifications including propagation delay (20.6 ns max), VIH/VIL thresholds, and ICC (≤1.4 μA) are fully guaranteed at 0.8 V and −40 °C to +125 °C. The Schmitt-trigger inputs maintain ≥150 mV hysteresis at this voltage, ensuring noise immunity in ultra-low-voltage energy-harvesting systems.
How does the IOFF feature protect during partial power-down?
When VCC = 0 V, the IOFF circuit disables both outputs and isolates all I/O terminals. This prevents current from flowing backward through the device - for instance, from a live 3.3 V bus into a powered-down 1.8 V domain - eliminating latch-up risk and meeting IEC 61000-4-2 system-level ESD robustness requirements.
Is the XSON8 (SOT1116) package compatible with standard reflow profiles?
Yes - the 74AUP2G241GN,115 in SOT1116 uses standard SnAgCu solder paste and complies with IPC/JEDEC J-STD-020D moisture sensitivity level 1 (MSL1). Its 0.35 mm height and wettable flanks support automated optical inspection (AOI) and reliable void-free reflow on fine-pitch PCBs.
74AUP2G241GN,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 8-XFDFN
- Packaging:
- Bulk
- Product Status:
- Active
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 2
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 4mA, 4mA
- Voltage - Supply:
- 0.8V ~ 3.6V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-XSON (1.2x1)
74AUP2G241GN,115 FAQ
1.How can I place an order for 74AUP2G241GN,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP2G241GN,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP2G241GN,115 reliable?
The price and inventory of 74AUP2G241GN,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP2G241GN,115 is usually 5 days.
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5.How can I obtain technical support or documentation for 74AUP2G241GN,115?
For technical support, including 74AUP2G241GN,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP2G241GN,115 requirements.
6.How does Aetrix verify that 74AUP2G241GN,115 is sourced from the original manufacturer or authorized distributors?
All 74AUP2G241GN,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP2G241GN,115 meets industry standards.
7.What is the process for return or replacement of 74AUP2G241GN,115?
All 74AUP2G241GN,115 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP2G241GN,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP2G241GN,115 part is unused and in its original packaging.
Return procedure for 74AUP2G241GN,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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