Nexperia USA Inc. 74AUP2G32GS,115

Overview

74AUP2G32GS,115 from Nexperia is a low-power dual 2-input OR gate in XSON8 package (SOT1203), operating from 0.8 V to 3.6 V supply, featuring Schmitt-trigger inputs for noise immunity and IOFF circuitry for partial power-down protection. It delivers propagation delay as low as 1.0 ns at 3.6 V/CL=5 pF and consumes ≤0.9 μA static current, targeting space-constrained battery-powered logic interfaces in industrial sensors and portable instrumentation.

For engineers reviewing the 74AUP2G32GS,115 datasheet, 74AUP2G32GS,115 pinout, 74AUP2G32GS,115 application, or 74AUP2G32GS,115 equivalent, key selection criteria include its ultra-low ICC (≤0.9 μA), overvoltage-tolerant inputs (up to 3.6 V), −40 °C to +125 °C operation, and IOFF-enabled system-level power sequencing in mixed-voltage domains.

Technical Context

This device implements two independent OR logic functions with Schmitt-trigger inputs-ensuring robust signal integrity against slow-rising or noisy digital signals across wide voltage rails. Its IOFF circuit actively disables outputs during power-down, blocking backflow current when VCC = 0 V.

Designed for sub-1-V operation down to 0.8 V, it maintains defined VIH/VIL thresholds across all VCC ranges (e.g., VIH ≥ 0.75×VCC at 1.1 V) and supports dynamic loading up to 30 pF while delivering tpd ≤ 6.4 ns at 3.6 V-enabling reliable timing in high-density, low-power control planes.

Key Specifications

Pinout & Package

XSON8 package (SOT1203): extremely thin small outline, no leads, 8-terminal surface-mount device with body dimensions 1.35 mm × 1.0 mm × 0.35 mm and thermal pad omitted.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual 2-input OR gate applications.

Compared with SN74LVC2G32DSFR and 74LVC2G32GM,132, the 74AUP2G32GS,115 uniquely combines sub-μA static current, Schmitt-trigger inputs, IOFF, and −40 °C to +125 °C rating-making it the sole choice for thermally demanding, battery-critical, or noise-prone embedded logic consolidation.

Availability

74AUP2G32GS,115 is available at Aetrix Electronics and suitable for industrial sensor interfaces, portable medical diagnostics, automotive body control modules, and IoT edge node power sequencing requiring stable component supply across extended temperature and low-power design constraints.

Supply support for 74AUP2G32GS,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a leading semiconductor manufacturer specializing in high-performance, energy-efficient logic, analog, and discrete components, with global R&D and manufacturing infrastructure.

The 74AUP (Advanced Ultra-low Power) logic family targets ultra-low-power, wide-voltage, and high-reliability applications-including battery-operated equipment, automotive subsystems, and industrial automation where minimal static current and robust noise immunity are essential.

FAQ

Does 74AUP2G32GS,115 support true 0.8 V logic operation?

Yes. The device is fully specified at VCC = 0.8 V, with guaranteed VIH ≥ 0.70×VCC (≥0.56 V) and VIL ≤ 0.30×VCC (≤0.24 V) across −40 °C to +125 °C. Propagation delay remains ≤16.8 ns (CL = 5 pF), enabling interoperability with sub-1-V microcontrollers and energy-harvesting SoCs.

How does IOFF protect the device during partial power-down?

When VCC = 0 V, the IOFF circuit disables both outputs (1Y and 2Y), limiting leakage to ±0.75 μA regardless of input/output voltage (0–3.6 V). This prevents damaging backflow current from powered downstream circuits into the unpowered gate, satisfying JEDEC JESD78 Class II Level B latch-up immunity requirements.

Can 74AUP2G32GS,115 drive a 15 pF load at 3.6 V with <5 ns delay?

Yes. At VCC = 3.6 V and CL = 15 pF, tpd is guaranteed ≤4.9 ns (max) across −40 °C to +125 °C. Typical delay is 3.1 ns, meeting timing budgets for high-speed peripheral handshaking in ARM Cortex-M4/M7-based controllers and FPGA configuration logic.

What is the thermal performance difference between SOT1203 and SOT1233-2 packages?

SOT1203 (74AUP2G32GS) has Ptot = 250 mW with 3.6 mW/K derating above +81 °C; SOT1233-2 (74AUP2G32GX) offers 300 mW and 7.7 mW/K derating above +118 °C. For ambient >85 °C or sustained 20 mA output loading, SOT1233-2 provides superior thermal headroom-but SOT1203 suffices for most logic-level signal conditioning with <5 mA average load.