Nexperia USA Inc. 74AUP2G32GT,115

Overview

74AUP2G32GT,115 from Nexperia is a dual 2-input OR gate logic IC with Schmitt-trigger inputs, operating across 0.8 V to 3.6 V supply, delivering ultra-low static current (≤1.4 μA at −40 °C to +125 °C), IOFF-enabled partial power-down protection, and propagation delay as low as 0.9 ns at VCC = 3.0 V with CL = 5 pF. It serves in voltage-level tolerant signal routing for battery-powered IoT sensor nodes.

For engineers reviewing the 74AUP2G32GT,115 datasheet, 74AUP2G32GT,115 pinout, 74AUP2G32GT,115 application, or 74AUP2G32GT,115 equivalent, key selection criteria include its 0.8 V minimum VCC support, IOFF leakage < ±0.75 μA at VCC = 0 V, Schmitt-trigger noise immunity, and XSON8 (SOT833-1) 1 × 1.95 × 0.5 mm package compatibility with high-density PCB layouts.

Technical Context

This device implements two independent OR logic functions with hysteresis on all four inputs (1A/1B/2A/2B), enabling robust operation with slow-rising or noisy signals. Its IOFF circuit actively disables outputs during power-down, blocking backflow current when VCC = 0 V.

Designed for mixed-voltage system interfacing, it supports overvoltage-tolerant inputs up to 3.6 V regardless of VCC level, and complies with JEDEC standards JESD8-12 through JESD8C across five VCC ranges - ensuring interoperability in 0.8 V, 1.2 V, 1.8 V, 2.5 V, and 3.3 V domains.

Key Specifications

Pinout & Package

XSON8 plastic extremely thin small outline package (SOT833-1); 8-terminal, leadless; body dimensions 1.0 mm × 1.95 mm × 0.5 mm; thermal pad omitted; pin 1 marked by notch or laser dot at lower-left corner below marking code "p32".

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual 2-input OR gate applications.

Compared with SN74LVC2G32DSFR and 74LVC2G32GM,132, the 74AUP2G32GT,115 uniquely supports sub-1 V operation, guarantees IOFF functionality, and provides Schmitt-trigger noise rejection - making it the sole choice for battery-critical, mixed-voltage, or harsh-environment designs requiring guaranteed power-down isolation and glitch immunity.

Availability

74AUP2G32GT,115 is available at Aetrix Electronics and suitable for industrial sensor interface, automotive body control, wearable health monitor, and smart home hub applications requiring stable component supply across extended temperature and low-voltage operating conditions.

Supply support for 74AUP2G32GT,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a leading semiconductor manufacturer specializing in high-performance, energy-efficient logic, analog, and discrete components, with global R&D and manufacturing facilities certified to IATF 16949 and ISO 9001.

The 74AUP (Advanced Ultra-low Power) logic family targets ultra-low-power portable and battery-operated systems, emphasizing sub-1 V operation, nanoscale leakage control, and robust ESD performance without sacrificing speed.

FAQ

Does 74AUP2G32GT,115 support true bidirectional signal routing?

No. The 74AUP2G32GT,115 is a unidirectional OR gate with defined inputs (1A/1B/2A/2B) and outputs (1Y/2Y). It lacks internal pass-gate architecture or direction-control logic. Signal flow is strictly input-to-output; reverse conduction is blocked by CMOS output stage design and absent in functional description or pinout.

Can 74AUP2G32GT,115 drive a 50 pF load reliably?

No. The datasheet specifies dynamic characteristics only up to CL = 30 pF, with tpd increasing to 8.5 ns at VCC = 3.6 V. Driving 50 pF exceeds validated operating conditions and may cause marginal timing, increased VOL, or excessive dynamic power dissipation beyond CPD-based calculations.

Is the XSON8 package (SOT833-1) thermally enhanced?

No. Unlike SOT1233-2 (X2SON8), the SOT833-1 package has no thermal pad or exposed die attach paddle. Its Ptot rating is 250 mW with 3.1 mW/K derating above 68 °C - significantly lower than thermally optimized variants - limiting use in sustained high-current switching.

What happens to outputs during VCC ramp-up?

Outputs remain in high-impedance state until VCC reaches ~0.5 V, then follow input logic after internal power-on reset completes (~100 ns). No output glitching or crowbar current occurs during power sequencing, as confirmed by Figure 4 propagation delay test setup and IOFF behavior under VCC = 0 V conditions.