Nexperia USA Inc. 74AUP2G38GM,125
- Part No.:
- 74AUP2G38GM,125
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Gates and Inverters
- Package:
- 8-XFQFN Exposed Pad
- Datasheet:
-
74AUP2G38GM,125.pdf
- Description:
- IC GATE NAND 2CH 2-INP 8XQFN
- Quantity:
- Payment:

- Shipping:

Inventory:200
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Product details
Overview
74AUP2G38GM,125 from Nexperia is a low-power dual 2-input NAND gate with open-drain outputs, designed for level-shifting and wired-logic interfacing in battery-powered and space-constrained systems. It operates across 0.8 V to 3.6 V supply, features Schmitt-trigger inputs for noise immunity, supports partial power-down via IOFF, and delivers propagation delays as low as 0.9 ns at 3.3 V (CL = 5 pF). It is used in I²C bus pull-up coordination and mixed-voltage GPIO expansion.
For engineers reviewing the 74AUP2G38GM,125 datasheet, 74AUP2G38GM,125 pinout, 74AUP2G38GM,125 application, or 74AUP2G38GM,125 equivalent, this device is selected for ultra-low static current (≤1.4 μA), wide-VCC compatibility, open-drain flexibility enabling active-LOW wired-OR, and guaranteed operation from –40 °C to +125 °C in XQFN8 packaging.
Technical Context
This logic gate implements two independent NAND functions with open-drain outputs, allowing direct connection to shared bus lines without external pull-ups when implementing wired-AND or wired-OR topologies. Each input incorporates Schmitt-trigger hysteresis, ensuring clean switching even with slow-rising signals across the full 0.8–3.6 V VCC range.
The IOFF circuit actively disables output leakage during partial power-down, blocking backflow current when VCC = 0 V while inputs/outputs remain biased up to 3.6 V. Input tolerance to 3.6 V enables interfacing with higher-voltage controllers regardless of VCC setting.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage (VCC) | 0.8 V to 3.6 V - Enables single-supply operation across sub-1V logic, 1.2V, 1.8V, 2.5V, and 3.3V domains. |
| Max ICC (Static) | 1.4 μA at –40 °C to +125 °C - Ensures negligible battery drain in always-on sensor nodes. |
| tpd (Propagation Delay) | 0.9 ns typical at VCC = 3.3 V, CL = 5 pF - Supports >100 MHz toggle rates in high-speed control paths. |
| Input Hysteresis | Integrated Schmitt trigger - Eliminates chatter on noisy or slow edges without external RC networks. |
| IOFF Leakage | ±0.75 μA max at VCC = 0 V - Prevents cross-current damage during hot-swap or staggered power sequencing. |
| ESD Rating | HBM >5000 V, CDM >1000 V - Robust handling in automated assembly and field-replaceable modules. |
| Operating Temp | –40 °C to +125 °C - Validated for under-hood automotive ECUs and industrial motor drives. |
Pinout & Package
XQFN8 package (SOT902-2): 1.35 mm × 1.0 mm × 0.35 mm body, 0.4 mm pitch, exposed thermal pad, no leads, wettable flanks.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | 1A | First NAND gate input A - Accepts 0–3.6 V logic regardless of VCC setting. |
| 2 | 1B | First NAND gate input B - Schmitt-triggered for noise rejection on slow-rising control signals. |
| 3 | 1Y | First NAND gate open-drain output - Requires external pull-up; sinks up to 20 mA. |
| 4 | GND | Digital ground reference - Shared return path for both gates and IOFF control. |
| 5 | 2Y | Second NAND gate open-drain output - Electrically isolated from 1Y; supports independent bus segments. |
| 6 | 2B | Second NAND gate input B - Matches 1B electrical behavior; enables identical timing across both gates. |
| 7 | 2A | Second NAND gate input A - Pin-compatible with 1A; allows mirrored signal conditioning paths. |
| 8 | VCC | Power supply input - Powers internal logic and IOFF circuitry; decoupling required within 2 mm. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low static power | ICC ≤ 1.4 μA over full temperature range - Extends shelf life and runtime in energy-harvesting systems. |
| Wide-VCC interoperability | Operates from 0.8 V to 3.6 V - Eliminates level shifters between 1.2V SoCs and 3.3V peripherals. |
| IOFF partial power-down | Blocks backflow current when VCC = 0 V - Safeguards powered subsystems during firmware updates or sleep transitions. |
| Input overvoltage tolerance | Accepts VI up to 3.6 V independent of VCC - Simplifies interface to legacy 5V-tolerant microcontrollers. |
| High-noise immunity | Schmitt-trigger inputs with hysteresis ≥100 mV - Rejects EMI in motor drive feedback loops and industrial comms. |
Applications
| Industrial Sensor Hub | I²C Bus Expansion |
|---|---|
Use Scenario: Aggregating digital outputs from multiple MEMS sensors (accelerometer, gyroscope, temp) onto a single MCU GPIO port. IC Role / Device Role / Timing Role: Dual NAND acts as programmable enable logic for sensor data latching and interrupt arbitration. Use Value: Open-drain outputs allow wired-OR of interrupt lines; Schmitt inputs suppress noise from long PCB traces in factory-floor environments. |
Use Scenario: Adding two additional I²C slave addresses to an existing bus using GPIO-controlled address selection. IC Role / Device Role / Timing Role: Configures pull-up enable/disable on SDA/SCL lines based on master address bits. Use Value: IOFF prevents backfeed when I²C controller is powered down while slaves remain active; 0.9 ns tpd avoids timing violations at 400 kHz Fast-mode+. |
| Battery-Powered Remote Control | Automotive Body Controller |
Use Scenario: Debouncing mechanical keypresses and generating wake-up pulses for ultra-low-power BLE SoC. IC Role / Device Role / Timing Role: NAND gates implement synchronous edge detection and pulse stretching on key scan lines. Use Value: 0.8 V minimum VCC enables direct coin-cell (1.5 V) operation with LDO dropout; 1.4 μA ICC extends 10-year shelf life. |
Use Scenario: Interfacing 5V-compatible LIN transceivers with 3.3V microcontroller GPIOs in door module ECUs. IC Role / Device Role / Timing Role: Level-translating and inverting control signals while maintaining fail-safe open-drain fault reporting. Use Value: –40 °C to +125 °C rating ensures reliability in engine bay proximity; 3.6 V input tolerance eliminates external clamping diodes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual open-drain NAND gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 74LVC2G38GW,125 | Higher ICC (max 4 μA), wider propagation delay (min 1.8 ns), same VCC range and IOFF. | LVC family optimized for 1.65–5.5 V; less suitable below 1.65 V than AUP. | Select when interfacing with 5 V tolerant systems where AUP's sub-1V capability is unnecessary. |
| SN74LVC2G38DCUR | TSSOP8 package (3.0 × 3.0 mm), no thermal pad, higher RθJA (270 K/W vs. 190 K/W), same electrical specs. | Preferred for prototyping or low-volume manual assembly due to larger footprint and solderability. | Choose for breadboard evaluation or when thermal constraints are relaxed and board space is available. |
Compared with 74LVC2G38GW,125 and SN74LVC2G38DCUR, the 74AUP2G38GM,125 provides superior sub-1V operation, lower static current, better thermal performance in XQFN8, and tighter propagation delay-making it optimal for energy-critical, space-constrained, and wide-VCC embedded designs.
Availability
74AUP2G38GM,125 is available at Aetrix Electronics and suitable for industrial sensor hubs, battery-powered remote controls, automotive body controllers, and I²C bus expansion requiring stable component supply across extended temperature ranges and ultra-low power budgets.
Supply support for 74AUP2G38GM,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance logic, discrete, and MOSFET solutions with emphasis on efficiency, reliability, and miniaturization for automotive, industrial, and mobile markets.
The 74AUP (Advanced Ultra-low Power) product line targets battery-operated and thermally constrained applications, prioritizing sub-1V operation, nanoamp-level quiescent current, and robustness across harsh environmental conditions.
FAQ
Can 74AUP2G38GM,125 drive a 10 kΩ pull-up resistor at 3.3 V?
Yes. With VOL ≤ 0.50 V at IO = 4.0 mA and VCC = 3.0 V, the device can sink ≥4 mA while staying within logic LOW thresholds. A 10 kΩ pull-up to 3.3 V draws only 0.33 mA, well within the 20 mA absolute maximum sink rating and compatible with the specified VOL performance across temperature.
Does the IOFF feature work when VCC is disconnected but inputs are biased to 1.8 V?
Yes. The IOFF circuit activates when VCC ≤ 0.2 V, disabling output FETs and limiting leakage to ±0.75 μA maximum-even if inputs or outputs are held at 1.8 V. This prevents back-current flow into a powered-down domain, satisfying JEDEC JESD78B Class II latch-up immunity requirements.
Is the XQFN8 (SOT902-2) package RoHS and REACH compliant?
Yes. Nexperia confirms full compliance with EU RoHS Directive 2011/65/EU and REACH Regulation (EC) No. 1907/2006 for the 74AUP2G38GM,125 in SOT902-2 packaging, including lead-free terminations, halogen-free molding compound, and conflict mineral–free supply chain documentation.
How does Schmitt-trigger input hysteresis improve performance in noisy environments?
Schmitt-trigger inputs provide ≥100 mV hysteresis (VIH − VIL) across all VCC levels, preventing multiple transitions on slowly rising/falling signals caused by EMI or crosstalk. This eliminates need for external RC filters in motor control feedback paths, industrial analog front-ends, and long-trace sensor interfaces.
74AUP2G38GM,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 8-XFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- NAND Gate
- Number of Circuits:
- 2
- Number of Inputs:
- 2
- Features:
- Open Drain
- Voltage - Supply:
- 0.8V ~ 3.6V
- Current - Quiescent (Max):
- 500 nA
- Current - Output High, Low:
- -, 4mA
- Input Logic Level - Low:
- 0.7V ~ 0.9V
- Input Logic Level - High:
- 1.6V ~ 2V
- Max Propagation Delay @ V, Max CL:
- 12.7ns @ 3.3V, 30pF
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-XQFN (1.6x1.6)
74AUP2G38GM,125 FAQ
1.How can I place an order for 74AUP2G38GM,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP2G38GM,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP2G38GM,125 reliable?
The price and inventory of 74AUP2G38GM,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP2G38GM,125 is usually 5 days.
3.What payment methods are accepted for 74AUP2G38GM,125?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP2G38GM,125 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP2G38GM,125?
74AUP2G38GM,125 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP2G38GM,125 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP2G38GM,125?
For technical support, including 74AUP2G38GM,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP2G38GM,125 requirements.
6.How does Aetrix verify that 74AUP2G38GM,125 is sourced from the original manufacturer or authorized distributors?
All 74AUP2G38GM,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP2G38GM,125 meets industry standards.
7.What is the process for return or replacement of 74AUP2G38GM,125?
All 74AUP2G38GM,125 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP2G38GM,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP2G38GM,125 part is unused and in its original packaging.
Return procedure for 74AUP2G38GM,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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