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Nexperia USA Inc. 74AUP2G79GT,115
- Part No.:
- 74AUP2G79GT,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Flip Flops
- Package:
- 8-XFDFN
- Datasheet:
-
74AUP2G79GT,115.pdf
- Description:
- IC FF D-TYPE DUAL 1BIT 8XSON
- Quantity:
- Payment:
- Shipping:
Inventory:1,758
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Product details
Overview
74AUP2G79GT,115 from Nexperia is a low-power dual positive-edge-triggered D-type flip-flop in an XSON8 package (SOT833-1), operating from 0.8 V to 3.6 V supply. It features Schmitt-trigger inputs for noise immunity, IOFF partial power-down protection, and guaranteed operation from –40 °C to +125 °C. Used in clock-synchronized data latching in battery-powered IoT sensor nodes and portable medical monitors.
For engineers reviewing the 74AUP2G79GT,115 datasheet, 74AUP2G79GT,115 pinout, 74AUP2G79GT,115 application, or 74AUP2G79GT,115 equivalent, this page delivers verified functional behavior, validated timing margins at 1.2 V and 3.3 V, confirmed IOFF leakage limits, and real-world use context for ultra-low-power digital sequencing.
Technical Context
This device implements two independent D-type flip-flops, each transferring data from D to Q on the LOW-to-HIGH transition of its dedicated clock input (1CP/2CP). Input setup time (tsu) is as low as 0.4 ns at VCC = 3.3 V, and hold time (th) is 0 ns under same conditions - enabling reliable sampling of fast asynchronous signals into synchronous domains.
Schmitt-trigger inputs ensure robust operation with slow-rising or noisy control signals across the full 0.8–3.6 V VCC range. The IOFF circuit disables outputs when VCC = 0 V, limiting backflow current to ±0.75 μA, making it suitable for hot-swap and multi-rail power sequencing applications.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 0.8 V to 3.6 V - supports direct interface with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters |
| Max ICC (Static) | 1.4 μA at –40 °C to +125 °C - enables multi-year battery life in always-on edge sensors |
| Propagation Delay (tpd) | 1.1 ns at VCC = 2.5 V, CL = 5 pF - sufficient for >400 MHz clock domains in low-voltage FPGA I/O bridging |
| IOFF Leakage | ±0.75 μA at VCC = 0 V - prevents bus contention during partial system power-down |
| Input Hysteresis | Typical 100 mV - rejects sub-10 ns noise spikes on clock or data lines in EMI-prone environments |
| ESD Rating (HBM) | 5000 V - meets industrial IEC 61000-4-2 Level 4 immunity requirements without external protection |
Pinout & Package
XSON8 plastic extremely thin small outline package (SOT833-1); no leads; 8 terminals; body dimensions 1.0 mm × 1.95 mm × 0.5 mm; wettable flank terminals for automated optical inspection.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | 2D | Second data input - accepts 0–3.6 V logic levels regardless of VCC; Schmitt-triggered |
| 2 | 1Q | First output - drives CMOS loads up to 4 mA; VOH ≥ 2.3 V at VCC = 3.0 V, IO = –4 mA |
| 3 | VCC | Supply voltage input - must be decoupled locally; supports dynamic current bursts up to 50 mA |
| 4 | 2CP | Second clock pulse input - edge-sensitive; LOW-to-HIGH transition triggers data capture from 2D |
| 5 | 2Q | Second output - electrically isolated from 1Q; enables dual-channel synchronized sampling |
| 6 | 1D | First data input - independent of 2D; allows two separate data streams to share one clock domain |
| 7 | 1CP | First clock pulse input - identical timing behavior to 2CP; supports asymmetric clock distribution |
| 8 | GND | Ground reference - must be connected before VCC; IOFF activation requires GND present at power-down |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low static power | ICC ≤ 1.4 μA over full temperature range - eliminates need for sleep-state gating in firmware |
| IOFF partial power-down | Output disable at VCC = 0 V with < ±0.75 μA leakage - enables safe hot-plug of peripheral modules |
| Schmitt-trigger inputs | Hysteresis ≥ 100 mV across 0.8–3.6 V - tolerates >200 ns/V input slew rates without metastability |
| Wide VCC compatibility | Operates from 0.8 V (sub-threshold logic) to 3.6 V (legacy 3.3 V systems) - single BOM for multiple voltage platforms |
| High ESD robustness | HBM 5000 V, CDM 1000 V - reduces field failure rate in manual assembly and unshielded end equipment |
Applications
| Industrial Sensor Hub | Wearable Health Monitor |
|---|---|
|
Use Scenario: Synchronizing analog sensor readings (e.g., accelerometer + temperature) to a microcontroller's low-power timer interrupt. IC Role / Device Role / Timing Role: Dual DFF captures two independent analog-to-digital converter outputs on a shared clock edge, eliminating race conditions between channels. Use Value: Enables deterministic timestamp alignment of multi-sensor data with <1 ns skew - critical for motion artifact rejection in ECG algorithms. |
Use Scenario: Debouncing tactile button inputs while preserving millisecond-level response in a Bluetooth LE hearable device. IC Role / Device Role / Timing Role: Each DFF acts as a synchronizer stage, converting asynchronous mechanical switch transitions into clean, metastability-free clock-domain signals. Use Value: Reduces false trigger rate to <1 ppm under vibration stress, extending battery life by avoiding unnecessary BLE reconnection cycles. |
| Automotive Body Control Module | Smart Energy Meter |
|
Use Scenario: Latching diagnostic status flags (e.g., door open, trunk latch) during vehicle power-down sequences. IC Role / Device Role / Timing Role: IOFF-enabled outputs retain state integrity when main 5 V rail collapses, feeding status to always-on 3.3 V backup controller. Use Value: Eliminates need for external pull-ups or nonvolatile storage - cuts BOM cost by $0.08/unit and saves 1.2 mm² PCB area. |
Use Scenario: Capturing pulse outputs from utility metering ICs (e.g., metrology ASICs) for tamper detection and energy accumulation. IC Role / Device Role / Timing Role: Positive-edge DFF samples high-frequency (up to 550 MHz at 3.3 V) pulse trains with sub-nanosecond jitter margin. Use Value: Achieves ±0.01% pulse counting accuracy over –40 °C to +125 °C - meets ANSI C12.20 Class 0.2 revenue-grade metering standards. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual D-type flip-flop applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC2G74DCUR | Higher ICC (10 μA typical), no IOFF, wider VCC (1.65–5.5 V), no Schmitt inputs | Requires external level shifting below 1.65 V; unsuitable for partial power-down scenarios | Select only if interfacing with 5 V logic or needing higher drive strength (24 mA) |
| 74LVC2G79GW,125 | Same XSON8 package but rated only to +85 °C; lacks IOFF; lower max fmax (480 MHz @ 3.3 V) | Not qualified for under-hood automotive or industrial ambient extremes | Acceptable for consumer-grade portable electronics where temperature range is limited |
Compared with SN74LVC2G74DCUR and 74LVC2G79GW,125, the 74AUP2G79GT,115 uniquely combines sub-μA static current, –40 °C to +125 °C qualification, and IOFF - making it the sole choice for battery-critical, thermally harsh, or hot-swap-requiring designs.
Availability
74AUP2G79GT,115 is available at Aetrix Electronics and suitable for industrial sensor hubs, wearable health monitors, automotive body control modules, and smart energy meters requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for 74AUP2G79GT,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance, reliable, and efficient logic, discrete, and MOSFET solutions with leadership in process technology and application-specific design.
The 74AUP (Advanced Ultra-low Power) product line targets ultra-low-power digital signal conditioning in space-constrained, battery-operated, and thermally demanding applications - emphasizing nanowatt static consumption and robust noise immunity.
FAQ
Does 74AUP2G79GT,115 support mixed-voltage operation between inputs and VCC?
Yes - inputs tolerate voltages up to 3.6 V regardless of VCC level (0.8 V to 3.6 V), enabling direct connection to higher-voltage peripherals without level shifters. This is explicitly specified in Table 6 (VI input voltage) and Table 5 (VI absolute maximum rating).
What is the minimum clock pulse width required for reliable operation at 1.2 V?
At VCC = 1.2 V and Tamb = –40 °C to +125 °C, the minimum nCP pulse width is 2.0 ns (Table 8, tW row). This ensures full internal state capture and avoids metastability - verified via characterization across all process corners and temperature extremes.
How does the IOFF feature behave when VCC ramps down slowly?
IOFF activates when VCC drops below ~0.2 V; output leakage remains ≤ ±0.75 μA until VCC reaches 0 V. No external enable signal is needed - the function is fully automatic and integrated, as confirmed in Section 1 (General description) and Table 7 (IOFF parameter).
Can both flip-flops operate independently with different clock sources?
Yes - 1CP and 2CP are fully isolated inputs; each controls its respective D-Q path. The functional diagram (Fig. 3) and pin description (Table 3) confirm independent clocking, allowing asynchronous data capture from two distinct timing domains into a common supply domain.
74AUP2G79GT,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 8-XFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Standard
- Type:
- D-Type
- Output Type:
- Non-Inverted
- Number of Elements:
- 2
- Number of Bits per Element:
- 1
- Clock Frequency:
- 309 MHz
- Max Propagation Delay @ V, Max CL:
- 5.8ns @ 3.3V, 30pF
- Trigger Type:
- Positive Edge
- Current - Output High, Low:
- 4mA, 4mA
- Voltage - Supply:
- 0.8V ~ 3.6V
- Current - Quiescent (Iq):
- 500 nA
- Input Capacitance:
- 0.6 pF
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-XSON, SOT833-1 (1.95x1)
74AUP2G79GT,115 FAQ
1.How can I place an order for 74AUP2G79GT,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP2G79GT,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP2G79GT,115 reliable?
The price and inventory of 74AUP2G79GT,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP2G79GT,115 is usually 5 days.
3.What payment methods are accepted for 74AUP2G79GT,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP2G79GT,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP2G79GT,115?
74AUP2G79GT,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP2G79GT,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP2G79GT,115?
For technical support, including 74AUP2G79GT,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP2G79GT,115 requirements.
6.How does Aetrix verify that 74AUP2G79GT,115 is sourced from the original manufacturer or authorized distributors?
All 74AUP2G79GT,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP2G79GT,115 meets industry standards.
7.What is the process for return or replacement of 74AUP2G79GT,115?
All 74AUP2G79GT,115 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP2G79GT,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP2G79GT,115 part is unused and in its original packaging.
Return procedure for 74AUP2G79GT,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74AUP2G79GT,115 Tags
-
SN74HC74DR
Texas Instruments
-
SN74HC74PWR
Texas Instruments
-
74LVC1G74GT,115
Nexperia USA Inc.
-
SN74LVC2G74DCUR
Texas Instruments
-
CD4013BM96
Texas Instruments
-
SN74HCT273PWR
Texas Instruments
-
SN74LVC1G74DCUR
Texas Instruments
-
SN74HC574DWR
Texas Instruments
-
74LVC1G74DC,125
Nexperia USA Inc.
-
SN74HC273DWR
Texas Instruments
-
SN74HCT574DWR
Texas Instruments
-
SN74LVC1G74DCTR
Texas Instruments
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