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Nexperia USA Inc. 74AUP2G80GT,115
- Part No.:
- 74AUP2G80GT,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Flip Flops
- Package:
- 8-XFDFN
- Datasheet:
-
74AUP2G80GT,115.pdf
- Description:
- IC FF D-TYPE DUAL 1BIT 8XSON
- Quantity:
- Payment:
- Shipping:
Inventory:5,000
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Product details
Overview
74AUP2G80GT,115 from Nexperia is a low-power dual positive-edge-triggered D-type flip-flop in an XSON8 (SOT833-1) package, operating across 0.8 V to 3.6 V supply. It features Schmitt-trigger inputs for noise immunity, IOFF partial power-down protection, and guaranteed operation from –40 °C to +125 °C. Used in clock-synchronized data latching in battery-powered IoT sensors and portable logic interfaces.
For engineers reviewing the 74AUP2G80GT,115 datasheet, 74AUP2G80GT,115 pinout, 74AUP2G80GT,115 application, or 74AUP2G80GT,115 equivalent, key selection criteria include ultra-low ICC (≤1.4 μA), sub-1 ns setup/hold timing at 3.3 V, IOFF-enabled system-level power gating, and XSON8 footprint compatibility with space-constrained PCB layouts.
Technical Context
This device implements two independent D-type flip-flops sharing no internal logic-each responds solely to its dedicated clock (1CP/2CP) and data (1D/2D) inputs. The positive-edge triggering behavior is strictly defined by LOW-to-HIGH transitions, with setup time as low as 0.2 ns and hold time down to –0.3 ns at VCC = 3.3 V.
Schmitt-trigger inputs enable robust operation with slow-rising signals (Δt/ΔV ≤ 200 ns/V), while IOFF circuitry actively disables outputs when VCC = 0 V, blocking backflow current up to ±0.75 μA. Static power consumption remains below 1.4 μA across full temperature and voltage range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 0.8 V to 3.6 V - supports single-supply operation across 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains |
| Max ICC (Static) | 1.4 μA at –40 °C to +125 °C - enables multi-year battery life in always-on sensor nodes |
| Propagation Delay | 1.2 ns typical at VCC = 3.3 V, CL = 5 pF - suitable for >500 MHz clock domains in low-voltage logic |
| IOFF Leakage | ±0.75 μA at VCC = 0 V - prevents destructive back-current during hot-swap or partial power-down sequences |
| Input Thresholds | VIH = 2.0 V min, VIL = 0.9 V max at VCC = 3.3 V - ensures clean logic interpretation with TTL-compatible drivers |
| ESD Rating | HBM >5000 V, CDM >1000 V - withstands handling and board-level ESD events without latch-up |
| Operating Temp | –40 °C to +125 °C - qualified for under-hood automotive, industrial control, and outdoor edge devices |
Pinout & Package
XSON8 plastic extremely thin small outline package (SOT833-1); 8-terminal, leadless, body dimensions 1.0 × 1.95 × 0.5 mm; wettable flank compatible for automated optical inspection.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | 2D | Second D-type flip-flop data input - sampled on rising edge of 2CP |
| 2 | 1Q | First flip-flop true output - reflects 1D state after 1CP rising edge |
| 3 | VCC | Primary supply rail - powers both flip-flops and IOFF control circuitry |
| 4 | 2CP | Second flip-flop clock input - triggers sampling of 2D on LOW-to-HIGH transition |
| 5 | 2Q | Second flip-flop true output - mirrors 2D state post-2CP edge |
| 6 | 1D | First D-type flip-flop data input - sampled on rising edge of 1CP |
| 7 | 1CP | First flip-flop clock input - controls transfer of 1D to 1Q on rising edge |
| 8 | GND | Reference ground - return path for all I/O and supply currents; required for IOFF functionality |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low static power | ICC ≤ 1.4 μA over full temp/voltage range - eliminates thermal derating concerns in sealed enclosures |
| IOFF partial power-down | Active output disable at VCC = 0 V - enables safe insertion/removal in live-backplane systems |
| Schmitt-trigger inputs | Input hysteresis ≥ 0.3 V at VCC = 3.3 V - tolerates noisy or slow-switching control signals without oscillation |
| Wide VCC compatibility | Operates from 0.8 V (sub-threshold logic) to 3.6 V (3.3 V tolerant) - bridges legacy and modern low-voltage domains |
| High-speed performance | fMAX = 510 MHz at VCC = 3.3 V, CL = 5 pF - supports high-throughput data serialization in compact logic blocks |
Applications
| Industrial Sensor Interface | Portable Medical Monitor |
|---|---|
|
Use Scenario: Synchronizing analog sensor samples (e.g., thermistor or accelerometer ADC outputs) to a master MCU clock domain. IC Role / Device Role / Timing Role: Dual-edge-aligned data latch - isolates asynchronous sensor data streams and presents synchronized Q outputs to MCU GPIO or DMA controller. Use Value: Eliminates metastability risk with <1 ns setup/hold margin at 3.3 V, while consuming <2 μA total quiescent current per channel. |
Use Scenario: Glitch-free state capture of button presses or switch closures in battery-powered ECG or pulse oximeter front-ends. IC Role / Device Role / Timing Role: Debounced input synchronizer - uses Schmitt-trigger inputs to reject contact bounce, then clocks clean edges into MCU interrupt logic. Use Value: Reduces firmware debounce overhead by >90%, extends coin-cell battery life beyond 3 years via 0.9 μA typical ICC. |
| Automotive Body Control Module | Low-Power Wireless Node |
|
Use Scenario: Level-shifting and synchronizing LIN bus status flags (e.g., door lock/unlock request) to a 3.3 V microcontroller. IC Role / Device Role / Timing Role: Voltage-tolerant interface buffer - accepts up to 3.6 V inputs while powered from 2.5 V MCU rail, with IOFF preventing backfeed during MCU sleep. Use Value: Enables direct connection to 3.3 V peripherals without external level shifters, reducing BOM count and layout area. |
Use Scenario: Clock-domain crossing between a 1.8 V BLE SoC's RF subsystem and its 3.3 V sensor interface peripheral. IC Role / Device Role / Timing Role: Asynchronous domain bridge - transfers wake-up trigger signals across voltage-isolated clock domains using dual independent flip-flops. Use Value: Achieves sub-microsecond latency with zero external components, maintaining <1.5 μA system standby current. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual D-type flip-flop applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC2G74DCUR | Higher ICC (max 10 μA), no IOFF, wider VCC (1.65–5.5 V), larger VSSOP8 package | Better suited for mixed-voltage 5 V legacy interfaces; lacks power-gating capability | Select when interfacing with 5 V logic or requiring higher drive strength (24 mA), not for ultra-low-power or hot-swap use. |
| 74LVC2G74GM,132 | Same XSON8 footprint, but no Schmitt-trigger inputs, higher min VCC (1.65 V), no IOFF | Limited to clean, fast-rising clock sources; unsuitable for noisy mechanical switch inputs or partial power-down | Choose only if cost is primary constraint and system operates exclusively above 1.65 V with controlled signal integrity. |
Compared with SN74LVC2G74DCUR and 74LVC2G74GM,132, the 74AUP2G80GT,115 uniquely delivers sub-μA static current, IOFF-enabled safe power sequencing, and Schmitt-trigger noise immunity-all in the same compact XSON8 package-making it the sole choice for energy-critical, ruggedized, or hot-pluggable designs.
Availability
74AUP2G80GT,115 is available at Aetrix Electronics and suitable for industrial sensor interfaces, portable medical monitors, and automotive body control modules requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for 74AUP2G80GT,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance logic, discrete, and MOSFET solutions optimized for efficiency, reliability, and miniaturization in high-volume applications.
The 74AUP (Advanced Ultra-low Power) logic family targets battery-operated and thermally constrained systems where nanowatt static power, wide VCC flexibility, and robust signal integrity are mandatory design requirements.
FAQ
Does the 74AUP2G80GT,115 support true bidirectional I/O or bus-hold functionality?
No. It is a unidirectional D-type flip-flop with dedicated input (D), clock (CP), and output (Q) terminals. Neither input nor output pins provide bus-hold, weak pull-up/down, or direction control. Outputs are push-pull CMOS with no tri-state capability-only IOFF disables them during power-down.
Can the 74AUP2G80GT,115 be operated reliably at 0.8 V with full timing guarantees?
Yes. The datasheet specifies tPD = 20.9 ns (typ), fMAX = 53 MHz, and VIH/VIL thresholds scaled to 0.70×VCC/0.25×VCC at 0.8 V, all validated from –40 °C to +125 °C. Setup time remains 2.5 ns (typ), confirming functional operation in sub-1 V ultra-low-power domains.
What is the maximum capacitive load the 74AUP2G80GT,115 can drive while maintaining specified propagation delay?
The device is characterized up to CL = 30 pF. At VCC = 3.3 V, tPD increases from 1.2 ns (CL = 5 pF) to 2.7 ns (CL = 30 pF). Driving loads >30 pF risks violating timing margins-external buffering is recommended for >50 pF traces or fan-out >10.
Is the XSON8 package of the 74AUP2G80GT,115 compatible with standard reflow profiles for lead-free assembly?
Yes. The SOT833-1 package is qualified for JEDEC J-STD-020 Class 3 moisture sensitivity (MSL3) and supports peak reflow temperatures up to 260 °C. Its 0.5 mm profile and wettable flanks ensure reliable solder joint formation and AOI detectability in high-density SMT lines.
74AUP2G80GT,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 8-XFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Standard
- Type:
- D-Type
- Output Type:
- Inverted
- Number of Elements:
- 2
- Number of Bits per Element:
- 1
- Clock Frequency:
- 309 MHz
- Max Propagation Delay @ V, Max CL:
- 6.4ns @ 3.3V, 30pF
- Trigger Type:
- Positive Edge
- Current - Output High, Low:
- 4mA, 4mA
- Voltage - Supply:
- 0.8V ~ 3.6V
- Current - Quiescent (Iq):
- 500 nA
- Input Capacitance:
- 0.6 pF
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-XSON, SOT833-1 (1.95x1)
74AUP2G80GT,115 FAQ
1.How can I place an order for 74AUP2G80GT,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP2G80GT,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP2G80GT,115 reliable?
The price and inventory of 74AUP2G80GT,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP2G80GT,115 is usually 5 days.
3.What payment methods are accepted for 74AUP2G80GT,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP2G80GT,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP2G80GT,115?
74AUP2G80GT,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP2G80GT,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP2G80GT,115?
For technical support, including 74AUP2G80GT,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP2G80GT,115 requirements.
6.How does Aetrix verify that 74AUP2G80GT,115 is sourced from the original manufacturer or authorized distributors?
All 74AUP2G80GT,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP2G80GT,115 meets industry standards.
7.What is the process for return or replacement of 74AUP2G80GT,115?
All 74AUP2G80GT,115 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP2G80GT,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP2G80GT,115 part is unused and in its original packaging.
Return procedure for 74AUP2G80GT,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74AUP2G80GT,115 Tags
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