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Home > Products > Integrated Circuits (ICs) > Logic > Gates and Inverters

NXP Semiconductors 74AUP2G86GD,125

Name: 74AUP2G86GD,125
Brand: NXP Semiconductors
SKU: 74AUP2G86GD,125
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: 74AUP2G86GD,125

Manufacturer:: NXP Semiconductors

Category:: Gates and Inverters

Package:: 8-XFDFN

Datasheet:: 74AUP2G86GD,125.pdf

Description:: IC GATE XOR 2CH 2-INP 8-XSON

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Product details

Overview

74AUP2G86GD,125 from Nexperia is a low-power dual 2-input XOR gate with Schmitt-trigger inputs, operating across 0.8 V to 3.6 V supply range, delivering <1.4 μA max ICC at −40 °C to +125 °C, 2.3 ns typical propagation delay at 3.0 V/CL=5 pF, and IOFF-enabled partial power-down protection. It serves as a noise-immune logic-level translator and signal combiner in battery-powered sensor interfaces and I²C bus arbitration circuits.

For engineers reviewing the 74AUP2G86GD,125 datasheet, 74AUP2G86GD,125 pinout, 74AUP2G86GD,125 application, or 74AUP2G86GD,125 equivalent, this device supports ultra-low-voltage mixed-signal interfacing, high-noise-margin digital conditioning, and hot-swap-safe I/O isolation - critical for portable medical monitors, industrial IoT edge nodes, and automotive body-control submodules.

Technical Context

This dual XOR gate implements two independent EXCLUSIVE-OR functions with Schmitt-trigger input thresholds (VIH = 0.70×VCC min, VIL = 0.25×VCC max at 125 °C), enabling robust operation with slow-rising signals across its full 0.8–3.6 V VCC range. Each gate features symmetric input/output drive strength and rail-to-rail voltage tolerance up to 3.6 V on all pins.

The IOFF circuit actively disables outputs when VCC = 0 V, limiting backflow current to ±0.75 μA, while latch-up immunity exceeds 100 mA per JESD78 Class II. Dynamic performance is characterized by CPD = 4.2 pF at 3.6 V and tpd ≤ 5.2 ns (max) over −40 °C to +125 °C with CL = 5 pF.

Key Specifications

Parameter	Value and Actual Design Meaning
Supply Voltage Range	0.8 V to 3.6 V - enables direct interface with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters
Max ICC (−40 °C to +125 °C)	1.4 μA - ensures <1 μW static power at 1.8 V, critical for multi-year battery life in wearables
Propagation Delay (3.0 V, CL=5 pF)	0.9–5.2 ns - supports >100 MHz toggle rates in clockless data path conditioning
IOFF Leakage (VCC = 0 V)	±0.75 μA - prevents cross-talk and bus contention during partial system power-down
Input Threshold Hysteresis	Typ. 100 mV - provides ≥40% noise margin against EMI in motor-drive feedback loops
ESD Robustness	HBM >5000 V, CDM >1000 V - eliminates need for external TVS in handheld diagnostic tool PCBs
Operating Temperature	−40 °C to +125 °C - qualified for under-hood automotive and industrial control cabinet deployment

Pinout & Package

XSON8 package (SOT996-2): plastic extremely thin small outline, no leads, 8 terminals, body size 1.35 × 1.0 × 0.35 mm - optimized for high-density routing in space-constrained modules like smart sensor nodes and wearable ECUs.

Pin/Terminal	Circuit Role	Design Meaning
1	1A	First XOR gate input A - accepts 0–3.6 V signals regardless of VCC; Schmitt-triggered
2	1Y	First XOR gate output Y - drives loads up to ±4 mA with VOL ≤ 0.50 V at 3.0 V
3	VCC	Positive supply - powers both gates; IOFF activates when pulled to 0 V
4	2A	Second XOR gate input A - electrically isolated from 1A; identical AC/DC specs
5	2Y	Second XOR gate output Y - independent output node; supports concurrent dual-channel logic
6	2B	Second XOR gate input B - shares same Schmitt threshold profile as 1A/1B
7	1B	First XOR gate input B - symmetrical to 1A; enables differential pair XOR detection
8	GND	Ground reference - return path for all I/O and supply currents; decoupling required within 2 mm

Key Features

Feature	Design Value
Wide-Voltage Schmitt Inputs	VIH/VIL thresholds scale with VCC (e.g., VIH ≥ 0.70×VCC at 125 °C), enabling reliable edge detection on noisy 1.2 V sensor outputs
IOFF Partial Power-Down	Outputs float to high-impedance state when VCC = 0 V, preventing backfeed into powered subsystems during firmware update sequences
Ultra-Low ICC	≤1.4 μA max over full temp range - reduces quiescent current in always-on wake-up logic by >95% vs. standard AHC logic
Rail-Tolerant I/O	All inputs/outputs withstand 0–3.6 V regardless of VCC setting - simplifies mixed-voltage board design without external clamping diodes
High Noise Immunity	Input hysteresis ≥100 mV and <10% VCC overshoot/undershoot - suppresses false toggling in ESD-prone factory automation environments

Applications

Industrial Sensor Interface

USB-C Port Controller Logic

Use Scenario: Level-shifting and XOR-based parity generation for analog sensor ADC outputs feeding an MCU over long traces in motor control cabinets.

IC Role / Device Role / Timing Role: Dual XOR gate performing real-time signal comparison and noise-filtered edge detection on differential thermistor and current-sense signals.

Use Value: Schmitt inputs reject 50/60 Hz magnetic interference; 0.8 V operation allows direct connection to low-power SAR ADC references.

Use Scenario: USB-C CC line state decoding and orientation detection logic in portable docking stations with multiple upstream ports.

IC Role / Device Role / Timing Role: XOR gate comparing CC1/CC2 voltage states to determine plug orientation and source/sink role negotiation status.

Use Value: IOFF prevents leakage current from unpowered port controllers into active CC lines, ensuring USB PD compliance during hot-plug events.

I²C Bus Arbitration

Medical Wearable Data Integrity

Use Scenario: Collision detection in multi-master I²C systems where multiple microcontrollers share a single bus in building automation nodes.

IC Role / Device Role / Timing Role: XOR gate monitoring SDA/SCL transitions to flag simultaneous write attempts and trigger bus recovery routines.

Use Value: Sub-5 ns propagation delay ensures arbitration decisions occur within I²C timing budget; 3.6 V tolerance handles legacy 3.3 V pull-ups.

Use Scenario: Real-time checksum validation of ECG waveform packets transmitted from a chest-worn patch to a smartphone via BLE.

IC Role / Device Role / Timing Role: XOR gate computing rolling parity bits across successive 8-bit ADC samples before RF transmission.

Use Value: 1.4 μA ICC extends battery life beyond 7 days; rail-tolerant I/O interfaces directly with 1.8 V BLE SoC GPIOs without level shifters.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual 2-input XOR gate applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
SN74LVC2G86DCUR	Higher ICC (10 μA typ), no Schmitt inputs, 1.65–5.5 V range	Lacks noise immunity on slow edges; requires external filtering in EMI-heavy environments	Select when interfacing with 5 V legacy peripherals and speed >8 ns is acceptable
74LVC2G86GM,132	Same XSON8 footprint but rated only to +85 °C; IOFF not specified	Not qualified for under-hood or industrial thermal cycling; no guaranteed power-down isolation	Choose only for cost-sensitive consumer electronics with ambient temperature <70 °C

Compared with SN74LVC2G86DCUR and 74LVC2G86GM,132, the 74AUP2G86GD,125 uniquely combines sub-μA static power, Schmitt-trigger noise rejection, and −40 °C to +125 °C IOFF-certified operation - making it the sole option for battery-powered automotive diagnostics and high-reliability industrial sensing where both ultra-low power and signal integrity are non-negotiable.

Availability

74AUP2G86GD,125 is available at Aetrix Electronics and suitable for industrial sensor interfaces, USB-C port controller logic, I²C bus arbitration, and medical wearable data integrity applications requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for 74AUP2G86GD,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a leading semiconductor manufacturer specializing in high-performance, energy-efficient logic, analog, and discrete components, headquartered in Nijmegen, Netherlands, with global R&D and manufacturing facilities.

The 74AUP (Advanced Ultra-low Power) product line targets battery-constrained and thermally demanding applications - designed specifically for ultra-low ICC, wide-VCC operation, and robust IOFF behavior in portable, automotive, and industrial systems.

FAQ

Does 74AUP2G86GD,125 support true bidirectional I/O?

No - it is a unidirectional logic gate with dedicated inputs (1A/1B/2A/2B) and outputs (1Y/2Y). While inputs tolerate voltages up to 3.6 V irrespective of VCC, outputs cannot be driven externally; the IOFF feature only disables output drivers during power-down, not enable reverse current flow.

Can this device operate reliably at 0.85 V supply?

Yes - the datasheet specifies full functionality down to 0.8 V, including guaranteed VIH ≥ 0.70×VCC and tpd ≤ 15.8 ns at 0.85 V/CL=5 pF over −40 °C to +125 °C. This enables direct integration with sub-1 V energy-harvesting PMIC outputs in wireless sensor networks.

What is the maximum capacitive load this XOR gate can drive?

The device is characterized up to CL = 30 pF, with tpd ≤ 9.2 ns at 3.6 V. Driving >30 pF risks violating setup/hold timing in synchronous systems; for heavier loads, add a buffer stage or reduce trace length - the 1.3 pF CO output capacitance confirms minimal intrinsic loading.

Is the SOT996-2 (XSON8) package RoHS and REACH compliant?

Yes - Nexperia certifies all 74AUP2G86 variants, including 74AUP2G86GD,125 in SOT996-2, as fully compliant with RoHS Directive 2011/65/EU and REACH Regulation (EC) No. 1907/2006, with lead-free matte tin terminations and halogen-free molding compound.

74AUP2G86GD,125 Specifications

Product attributes: Attribute value

Manufacturer:: NXP Semiconductors

Series:: 74AUP

Package/Case:: 8-XFDFN

Packaging:: Bulk

Product Status:: Active

Logic Type:: XOR (Exclusive OR)

Number of Circuits:: 2

Number of Inputs:: 2

Features:: -

Voltage - Supply:: 0.8V ~ 3.6V

Current - Quiescent (Max):: 500 nA

Current - Output High, Low:: 4mA, 4mA

Input Logic Level - Low:: 0.7V ~ 0.9V

Input Logic Level - High:: 1.6V ~ 2V

Max Propagation Delay @ V, Max CL:: 7.1ns @ 3.3V, 30pF

Operating Temperature:: -40°C ~ 125°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 8-XSON (2x3)

74AUP2G86GD,125 FAQ

1.How can I place an order for 74AUP2G86GD,125 through Aetrix?

Please submit a Request for Quotation (RFQ) for 74AUP2G86GD,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 74AUP2G86GD,125 reliable?

The price and inventory of 74AUP2G86GD,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP2G86GD,125 is usually 5 days.

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74AUP2G86GD,125 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 74AUP2G86GD,125 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 74AUP2G86GD,125?

For technical support, including 74AUP2G86GD,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP2G86GD,125 requirements.

6.How does Aetrix verify that 74AUP2G86GD,125 is sourced from the original manufacturer or authorized distributors?

All 74AUP2G86GD,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP2G86GD,125 meets industry standards.

7.What is the process for return or replacement of 74AUP2G86GD,125?

All 74AUP2G86GD,125 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP2G86GD,125, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 74AUP2G86GD,125 part is unused and in its original packaging.

Return procedure for 74AUP2G86GD,125:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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