Nexperia USA Inc. 74AUP2G86GS,115

Overview

74AUP2G86GS,115 from Nexperia is a low-power dual 2-input EXCLUSIVE-OR gate in XSON8 package (1.35 × 1.0 × 0.35 mm), operating from 0.8 V to 3.6 V supply, featuring Schmitt-trigger inputs for noise immunity, IOFF partial power-down protection, and guaranteed operation from –40 °C to +125 °C. It delivers propagation delay as low as 1.0 ns at 3.6 V (CL = 5 pF) and static ICC ≤ 1.4 μA max across full temperature range.

For engineers reviewing the 74AUP2G86GS,115 datasheet, 74AUP2G86GS,115 pinout, 74AUP2G86GS,115 application, or 74AUP2G86GS,115 equivalent, this device is selected for ultra-low-power logic interfacing in battery-powered IoT sensors, portable medical monitors, and industrial control I/O expansion where rail-to-rail input tolerance, sub-1-μA quiescent current, and robust ESD performance (HBM >5 kV) are critical.

Technical Context

This dual XOR gate implements two independent 2-input exclusive-OR functions with Schmitt-trigger inputs-enabling reliable signal conditioning of slow-rising or noisy digital signals across its full 0.8–3.6 V VCC range. Each gate's output drives up to ±4 mA at 3.0 V while maintaining VOL ≤ 0.50 V and VOH ≥ 2.30 V under worst-case –40 °C to +125 °C conditions.

The IOFF circuit actively disables outputs during power-down, limiting backflow current to ±0.75 μA when VCC = 0 V and any input/output is biased to 0–3.6 V. Input capacitance is 0.6 pF typical; output capacitance is 1.3 pF typical-minimizing dynamic loading in high-speed, low-energy routing paths.

Key Specifications

Pinout & Package

XSON8 package (SOT1203): extremely thin small outline, no leads, 8 terminals, body size 1.35 × 1.0 × 0.35 mm, pin 1 index located on lower-left corner below marking "pH".

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual 2-input XOR gate applications.

Compared with SN74LVC2G86DCUR, the 74AUP2G86GS,115 offers 10× lower static current and Schmitt inputs for noise resilience-making it superior for energy-sensitive edge devices. Versus 74LVC2G86GM,132, it uses a thinner XSON8 variant optimized for ultra-low-profile assemblies where 0.35 mm height is mandatory.

Availability

74AUP2G86GS,115 is available at Aetrix Electronics and suitable for wearable health monitors, industrial PLC I/O modules, wireless sensor nodes, and automotive body control units requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for 74AUP2G86GS,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert delivering high-performance logic, discrete, and MOSFET solutions with emphasis on efficiency, reliability, and miniaturization for consumer, industrial, and automotive markets.

The 74AUP (Advanced Ultra-low Power) logic family targets battery-operated and thermally constrained applications-designed specifically to minimize static/dynamic power while maintaining speed and noise immunity across wide voltage and temperature ranges.

FAQ

Does 74AUP2G86GS,115 support mixed-voltage operation between inputs and VCC?

Yes. Inputs tolerate voltages up to 3.6 V regardless of VCC level (0.8–3.6 V), enabling direct connection of 3.3 V or 2.5 V signals into a 1.2 V powered device without level shifters. This rail-to-rail input capability is explicitly specified in Table 6 and Table 7 of the datasheet.

What is the maximum capacitive load the outputs can drive while maintaining timing specs?

The device is characterized up to 30 pF load capacitance. At VCC = 3.6 V, tpd remains ≤7.1 ns (CL = 30 pF). Driving loads >30 pF increases propagation delay nonlinearly and may degrade VOL/VOH margins-designers should limit total net capacitance (including trace, probe, and input pins) to ≤25 pF for guaranteed timing compliance.

How does the IOFF feature behave during power sequencing?

When VCC drops below ~0.2 V, the IOFF circuit activates automatically, disabling both outputs and limiting leakage to ±0.75 μA even if inputs/outputs are held at 0–3.6 V. This prevents backflow current during partial power-down-verified in Table 7 under ΔIOFF and IOFF test conditions with VCC = 0 V.

Is the 74AUP2G86GS,115 qualified for automotive applications?

No. While rated for –40 °C to +125 °C, it is not AEC-Q100 qualified and lacks automotive-specific stress testing, failure analysis, or PPAP documentation. Nexperia explicitly states in Section 15 that non-automotive qualified products are unsuitable for safety-critical automotive use unless separately validated by the customer.