Nexperia USA Inc. 74AUP2G97GUX

Overview

74AUP2G97GUX from Nexperia is a dual configurable multiple-function logic gate with Schmitt-trigger inputs, enabling per-gate selection of MUX, AND, OR, NAND, NOR, inverter, or buffer functions via 3-bit configuration inputs. It operates across 0.8 V to 3.6 V supply, delivers ≤0.9 μA max ICC at 125 °C, supports partial power-down (IOFF), and targets low-power PCB-level signal conditioning in space-constrained industrial and portable electronics.

For engineers reviewing the 74AUP2G97GUX datasheet, 74AUP2G97GUX pinout, 74AUP2G97GUX application, or 74AUP2G97GUX equivalent, this page provides verified functional identity, validated XQFN10 pin mapping, confirmed Schmitt-trigger noise immunity (VH ≥ 0.07 V at VCC = 0.8 V), IOFF-enabled system-level power sequencing capability, and real-world logic reconfiguration use cases.

Technical Context

The device implements two independent configurable gates, each accepting three control inputs (nA/nB/nC) to select one of seven combinational logic functions per gate. All inputs tolerate up to 3.6 V regardless of VCC, enabling mixed-voltage interfacing.

Its Schmitt-trigger inputs provide hysteresis (VH = 0.07–1.31 V depending on VCC), ensuring robust noise rejection in noisy environments. The IOFF circuit disables outputs during partial power-down, limiting backflow current to ±0.75 μA when VCC = 0 V.

Key Specifications

Pinout & Package

XQFN10 package (SOT1160-1): 1.40 × 1.80 × 0.50 mm body, no leads, wettable flank terminals, 10-pin layout optimized for high-density routing and automated optical inspection.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar configurable logic gate applications.

Compared with 74LVC2G97DP and SN74LVC2G53DCTR, the 74AUP2G97GUX uniquely combines ultra-low ICC (<1 μA), Schmitt-trigger noise immunity, full logic configurability, and IOFF-making it the sole option for battery-powered, noise-prone, multi-rail systems requiring dynamic logic redefinition.

Availability

74AUP2G97GUX is available at Aetrix Electronics and suitable for industrial sensor interfaces, portable device power sequencing, automotive body control modules, and IoT edge node signal routing requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for 74AUP2G97GUX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance logic, discrete, and MOSFET solutions for automotive, industrial, and consumer markets.

The 74AUP2G97GUX belongs to Nexperia's Advanced Ultra-low Power (AUP) logic family, designed specifically for energy-constrained, space-limited applications where dynamic logic reconfiguration, noise resilience, and multi-voltage interoperability are mandatory.

FAQ

What logic functions can each gate implement?

Each of the two gates supports seven selectable functions: 2-input MUX, AND, OR, NAND, NOR, inverter, and buffer. Selection is determined by the 3-bit combination applied to pins nA/nB/nC per gate, as defined in Table 4 and Figures 2–8 of the datasheet. No external components are required to set the function.

Does the 74AUP2G97GUX support mixed-voltage operation?

Yes. Inputs accept voltages up to 3.6 V independent of VCC, allowing direct connection to higher-voltage sources (e.g., 3.3 V GPIO) while operating from as low as 0.8 V. This eliminates level shifters in multi-rail designs and simplifies interface with legacy or heterogeneous logic families.

How does the IOFF feature behave during power-down?

When VCC = 0 V, the IOFF circuit actively disables both outputs (1Y and 2Y), clamping them to high-impedance state. Output leakage remains ≤±0.75 μA even with inputs or outputs biased to 3.6 V, preventing damaging backflow current into unpowered sections of the system.

Is the XQFN10 package (SOT1160-1) compatible with standard reflow profiles?

Yes. The SOT1160-1 package is qualified for IPC/JEDEC J-STD-020 moisture sensitivity level 1 (MSL-1) and supports standard lead-free reflow profiles up to 260 °C peak. Its wettable flanks enable reliable automated optical inspection (AOI) of solder joints in high-volume SMT assembly.