Nexperia USA Inc. 74AUP2GU04GW,125

Overview

74AUP2GU04GW,125 from Nexperia is a dual unbuffered CMOS inverter optimized for ultra-low-power operation across 0.8 V–3.6 V supply rails, delivering ICC ≤ 0.9 μA (max) at −40 °C to +125 °C, propagation delay as low as 0.3 ns (VCC = 3.6 V, CL = 5 pF), and overvoltage-tolerant inputs up to 3.6 V - deployed in battery-powered sensor interfaces and crystal oscillator biasing circuits.

For engineers reviewing the 74AUP2GU04GW,125 datasheet, 74AUP2GU04GW,125 pinout, 74AUP2GU04GW,125 application, or 74AUP2GU04GW,125 equivalent, this device serves as a precision signal inversion element where static current budget, rail flexibility, and noise immunity are critical - especially in space-constrained industrial IoT nodes and low-voltage timing subsystems.

Technical Context

The 74AUP2GU04GW,125 implements two independent unbuffered inverter stages using advanced AUP (Advanced Ultra-low Power) CMOS logic, eliminating internal buffering to minimize propagation delay and capacitive loading while preserving rail-to-rail input voltage tolerance. Its input structure supports VI up to 3.6 V regardless of VCC, enabling level-shifting between disparate supply domains.

Dynamic performance is characterized by load-dependent tpd ranging from 0.3 ns (CL = 5 pF, VCC = 3.6 V) to 5.7 ns (CL = 30 pF, VCC = 3.6 V), with CPD = 4.5 pF at VCC = 3.6 V - enabling accurate dynamic power estimation via PD = CPD × VCC² × fi × N. Input and output capacitances are tightly controlled at CI = 1.5 pF and CO = 1.8 pF.

Key Specifications

Pinout & Package

TSSOP6 (SOT363-2) package: plastic thin shrink small outline, 6-lead, 1.25 mm body width, 0.65 mm lead pitch, exposed pad not present.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual inverter applications.

Compared with SN74LVC2G04DBVR and 74LVC2GU04GW,125, the 74AUP2GU04GW,125 uniquely delivers sub-1 μA ICC, 3.6 V input tolerance at any VCC ≥ 0.8 V, and unbuffered timing - making it the sole choice for long-life, mixed-rail, oscillator-critical designs.

Availability

74AUP2GU04GW,125 is available at Aetrix Electronics and suitable for industrial sensor nodes, battery-powered timing modules, and automotive body control units requiring stable component supply across extended temperature ranges and multi-year production cycles.

Supply support for 74AUP2GU04GW,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert specializing in high-performance, energy-efficient logic, analog, and discrete components - with manufacturing rooted in process innovation and automotive-grade reliability.

The 74AUP2GU04GW,125 belongs to the Advanced Ultra-low Power (AUP) logic family, engineered specifically for ultra-low-static-power digital signal conditioning in battery-constrained and thermally demanding environments.

FAQ

Can the 74AUP2GU04GW,125 operate reliably at VCC = 0.85 V?

Yes. The device is fully specified down to 0.8 V with guaranteed VIH ≥ 0.75 × VCC and VOL ≤ 0.36 V at IO = 2.7 mA. At 0.85 V, propagation delay increases to ~5.3 ns (CL = 5 pF), and ICC remains ≤ 1.4 μA - validated across −40 °C to +125 °C per Table 7 and Table 8.

Is the 74AUP2GU04GW,125 pin-compatible with other 6-pin logic packages like SOT23-6?

No. It uses the SOT363-2 (TSSOP6) footprint with 0.65 mm pitch and 1.25 mm body width - incompatible with SOT23-6 (0.95 mm pitch, 2.9 mm width). Direct replacement requires PCB redesign; however, it shares pinout compatibility with 74AUP2GU04GM/GN/GS in XSON6 variants (SOT886/SOT1115/SOT1202).

What is the maximum capacitive load the 74AUP2GU04GW,125 can drive while maintaining specified tpd?

The datasheet specifies tpd up to CL = 30 pF across all VCC conditions. At VCC = 3.6 V, tpd remains ≤ 5.7 ns (−40 °C to +125 °C), with output rise/fall times < 2.5 ns. Driving >30 pF risks violating the 10% overshoot limit and may increase propagation uncertainty beyond ±0.3 ns.

Does the 74AUP2GU04GW,125 support hot-swap or live-insertion?

No. The device lacks Ioff protection or power-off isolation - applying input signals while VCC = 0 V may forward-bias internal ESD diodes, causing leakage or latch-up. Always power VCC before asserting inputs, and use series resistors (≥1 kΩ) if hot-swap is unavoidable.