NXP Semiconductors 74AUP3G14GSX
- Part No.:
- 74AUP3G14GSX
- Manufacturer:
- NXP Semiconductors
- Category:
- Gates and Inverters
- Package:
- 8-XFDFN
- Datasheet:
-
74AUP3G14GSX.pdf
- Description:
- IC INVERT SCHMITT 3CH 3INP 8XSON
- Quantity:
- Payment:

- Shipping:

Inventory:5,000
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
74AUP3G14GSX from Nexperia is a low-power triple Schmitt trigger inverter IC designed for signal conditioning in ultra-low-voltage digital systems. It provides three independent inverting buffers with hysteresis (VH = 0.79–1.31 V at VCC = 3.0 V), operates across 0.8 V to 3.6 V supply, delivers < 4.0 ns propagation delay at 3.0 V/CL = 5 pF, and features IOFF circuitry for partial power-down protection. It is used in relaxation oscillators, pulse shaping, and noise-immune sensor interface circuits.
For engineers reviewing the 74AUP3G14GSX datasheet, 74AUP3G14GSX pinout, 74AUP3G14GSX application, or 74AUP3G14GSX equivalent, key selection criteria include input hysteresis voltage (VT+ and VT−), ICC ≤ 1.4 μA over −40 °C to +125 °C, IOFF leakage ≤ ±0.75 μA during power-down, and compatibility with 1.0 mm × 1.35 mm XSON8 (SOT1203) packaging.
Technical Context
The 74AUP3G14GSX implements three independent Schmitt-trigger inverters in a single die, each with asymmetric switching thresholds (e.g., VT+ = 1.88–2.32 V, VT− = 0.88–1.24 V at VCC = 3.0 V) to reject slow-rising noise. Its IOFF circuit actively disables outputs when VCC = 0 V, preventing backflow current and enabling hot-swap capability in multi-rail systems.
Dynamic performance is load- and voltage-dependent: tpd ranges from 1.5 ns (VCC = 3.0 V, CL = 5 pF) to 7.4 ns (VCC = 3.0 V, CL = 30 pF), while CPD remains stable at 4.3 pF. Input capacitance is 1.1 pF and output capacitance is 1.7 pF, supporting high-speed edge integrity with minimal loading.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 0.8 V to 3.6 V - enables direct interfacing with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters |
| Max ICC | 1.4 μA at −40 °C to +125 °C - ensures battery-powered operation for >10 years in always-on IoT nodes |
| Hysteresis Voltage VH | 0.79–1.31 V at VCC = 3.0 V - rejects up to 43% of VCC amplitude noise on slow analog-like inputs |
| Propagation Delay | 1.5–7.4 ns (VCC = 3.0 V, CL = 5–30 pF) - supports reliable clockless timing generation up to ~100 MHz in oscillator topologies |
| IOFF Leakage | ±0.75 μA at VCC = 0 V - prevents cross-rail current in powered-down subsystems, satisfying JESD78 Class II latch-up immunity |
| Operating Temp | −40 °C to +125 °C - qualified for under-hood automotive, industrial control, and extended-range sensor modules |
| Input Voltage Range | 0 V to 3.6 V - allows 5 V-tolerant inputs even when VCC = 0.8 V, simplifying mixed-voltage board design |
Pinout & Package
XSON8 package (SOT1203): extremely thin small outline, no leads, 1.35 mm × 1.0 mm × 0.35 mm body, 8 terminals, wettable flank compatible for automated optical inspection.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | 3A (Input) | Third Schmitt inverter input; accepts 0–3.6 V regardless of VCC level |
| 2 | 3Y (Output) | Inverted output of third channel; drives capacitive loads up to 30 pF with sub-7.5 ns delay |
| 3 | 1Y (Output) | Inverted output of first channel; shares same electrical specs as Pin 2 |
| 4 | GND | Dedicated ground reference for all internal logic and ESD structures; must be low-impedance |
| 5 | 2Y (Output) | Inverted output of second channel; electrically isolated but co-die with Pins 2 and 3 |
| 6 | 2A (Input) | Second Schmitt inverter input; identical hysteresis and threshold behavior as Pin 1 |
| 7 | 1A (Input) | First Schmitt inverter input; pin 1 index located below marking code in lower-left corner |
| 8 | VCC | Single-supply rail for all three channels; IOFF activates automatically when VCC = 0 V |
Key Features
| Feature | Design Value |
|---|---|
| Triple Schmitt Trigger Action | Three independent hysteresis-input inverters on one die reduce PCB area by 67% vs. discrete solutions |
| IOFF Partial Power-down | Outputs go high-impedance when VCC = 0 V, eliminating backfeed paths in modular or hot-pluggable systems |
| Ultra-Low ICC | ≤1.4 μA max over full temperature range - extends shelf life and runtime in energy-harvesting applications |
| Wide-Voltage Operation | 0.8 V to 3.6 V supply supports direct integration with modern sub-1 V microcontrollers and legacy 3.3 V peripherals |
| High Noise Immunity | Input hysteresis ≥0.79 V at 3.0 V enables robust operation in EMI-prone environments like motor control feedback loops |
Applications
| Wave and Pulse Shaper | Astable Multivibrator |
|---|---|
Use Scenario: Converting noisy, slow-rising encoder or switch bounce signals into clean, jitter-free square waves for MCU GPIO capture. IC Role / Device Role / Timing Role: Signal conditioner that reshapes analog-like transitions using VT+/VT− thresholds to eliminate metastability. Use Value: Eliminates need for external RC filtering and software debouncing, reducing firmware complexity and interrupt latency. | Use Scenario: Generating precise, temperature-stable clock signals in low-power sensor nodes where crystal oscillators are cost- or size-prohibitive. IC Role / Device Role / Timing Role: Core timing element in a two-gate relaxation oscillator (with external R/C network). Use Value: Delivers 1–100 kHz clock generation with < ±5% frequency drift over −40 °C to +125 °C using only two passive components. |
| Monostable Multivibrator | Sensor Interface Conditioning |
Use Scenario: Creating fixed-duration pulses from momentary button presses or fault triggers in industrial HMI or safety interlocks. IC Role / Device Role / Timing Role: One-shot generator using Schmitt-trigger hysteresis and external RC timing network. Use Value: Provides consistent 10–500 ms pulse widths independent of input rise time, improving system response predictability. | Use Scenario: Interfacing thermistors, potentiometers, or analog sensors to ADC inputs in battery-powered wearables. IC Role / Device Role / Timing Role: Threshold detector that converts slowly varying analog voltages into clean digital edges for wake-up or event triggering. Use Value: Enables ultra-low-power "always-listen" mode with < 2 μA total system quiescent current including IC and sensor bias. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Schmitt trigger inverter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G14DBVR | Wider VCC range (1.65–5.5 V); higher ICC (max 10 μA); no IOFF; larger SOT-23-5 package | Requires ≥1.65 V supply; unsuitable for true 0.8 V systems or partial power-down use cases | Select when interfacing with 5 V logic or when board space permits larger footprint and higher static current is acceptable |
| 74LVC1G17GW,125 | Non-inverting Schmitt buffer; same VCC (1.65–5.5 V); no IOFF; identical XSON6 (SOT886) package size | Lacks inversion function; cannot replace 74AUP3G14GSX in oscillator or monostable topologies requiring inverting feedback | Choose only for non-inverting signal conditioning where polarity preservation is required and 0.8 V operation is not needed |
Compared with SN74LVC1G14DBVR and 74LVC1G17GW,125, the 74AUP3G14GSX uniquely supports 0.8 V operation, delivers sub-2 μA ICC, and includes IOFF-making it the sole option for ultra-low-voltage, hot-swap-capable, and battery-critical designs.
Availability
74AUP3G14GSX is available at Aetrix Electronics and suitable for wave shapers, relaxation oscillators, monostable timers, and sensor interface circuits requiring stable component supply across automotive, industrial, and portable electronics programs.
Supply support for 74AUP3G14GSX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance, reliable, and efficient logic, discrete, and MOSFET solutions with leadership in process technology and application-specific optimization.
The 74AUP (Advanced Ultra-low Power) product line targets battery-constrained and thermally sensitive applications-designed specifically for sub-1 V digital interfacing, energy harvesting, and always-on sensing systems.
FAQ
What is the minimum supply voltage for guaranteed operation of the 74AUP3G14GSX?
The 74AUP3G14GSX is fully specified from 0.8 V to 3.6 V. At VCC = 0.8 V, it maintains functional Schmitt behavior with VT+ ≈ 0.30–0.60 V and VT− ≈ 0.10–0.60 V, and propagation delay remains within datasheet limits (tpd ≤ 19.9 ns, CL = 5 pF). This enables direct use with emerging 0.8 V-core processors and energy-harvesting PMIC outputs.
How does the IOFF feature protect the device during partial power-down?
When VCC = 0 V, the IOFF circuit disables all three outputs, forcing them into high-impedance state regardless of input voltage (up to 3.6 V). This prevents damaging backflow current from live signal lines into a powered-down domain, satisfying JESD78 Class II latch-up immunity and enabling safe hot-swap in modular systems.
Can the 74AUP3G14GSX drive a 30 pF load at 3.0 V while maintaining timing integrity?
Yes. At VCC = 3.0 V and CL = 30 pF, the 74AUP3G14GSX guarantees tpd ≤ 7.4 ns (−40 °C to +125 °C), with typical value 5.2 ns. Output drive strength (IO = ±4.0 mA) and low CO = 1.7 pF ensure minimal waveform distortion, making it suitable for driving multiple gate inputs or short PCB traces in timing-critical oscillator feedback paths.
Is the XSON8 (SOT1203) package of the 74AUP3G14GSX compatible with standard reflow profiles?
Yes. The SOT1203 package is qualified for IPC/JEDEC J-STD-020 moisture sensitivity level 1 (MSL1) and supports standard lead-free reflow profiles (peak temperature ≤ 260 °C). Its 0.35 mm height and wettable flanks enable reliable automated optical inspection (AOI) and high-yield placement in high-density layouts.
74AUP3G14GSX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- 74AUP
- Package/Case:
- 8-XFDFN
- Packaging:
- Bulk
- Product Status:
- Active
- Logic Type:
- Inverter
- Number of Circuits:
- 3
- Number of Inputs:
- 3
- Features:
- Schmitt Trigger
- Voltage - Supply:
- 0.8V ~ 3.6V
- Current - Quiescent (Max):
- 500 nA
- Current - Output High, Low:
- 4mA, 4mA
- Input Logic Level - Low:
- 0.1V ~ 0.88V
- Input Logic Level - High:
- 0.6V ~ 2.29V
- Max Propagation Delay @ V, Max CL:
- 6.1ns @ 3.3V, 30pF
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-XSON (1.35x1)
74AUP3G14GSX FAQ
1.How can I place an order for 74AUP3G14GSX through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP3G14GSX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP3G14GSX reliable?
The price and inventory of 74AUP3G14GSX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP3G14GSX is usually 5 days.
3.What payment methods are accepted for 74AUP3G14GSX?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP3G14GSX transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP3G14GSX?
74AUP3G14GSX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP3G14GSX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP3G14GSX?
For technical support, including 74AUP3G14GSX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP3G14GSX requirements.
6.How does Aetrix verify that 74AUP3G14GSX is sourced from the original manufacturer or authorized distributors?
All 74AUP3G14GSX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP3G14GSX meets industry standards.
7.What is the process for return or replacement of 74AUP3G14GSX?
All 74AUP3G14GSX units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP3G14GSX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP3G14GSX part is unused and in its original packaging.
Return procedure for 74AUP3G14GSX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74AUP3G14GSX Tags
-
SN74LVC1G14DBVR
Texas Instruments
-
SN74LVC1G14DCKR
Texas Instruments
-
SN74AHC1G14DBVR
Texas Instruments
-
SN74LVC1G08DBVR
Texas Instruments
-
SN74LVC1G08DCKR
Texas Instruments
-
SN74LVC1G32DCKR
Texas Instruments
-
SN74LVC1G04DBVR
Texas Instruments
.jpg)
-
74LVC1G08GW,125
Nexperia USA Inc.
-
SN74LVC1G04DCKR
Texas Instruments
-
SN74AHC1G08DBVR
Texas Instruments
-
SN74LVC1G32DBVR
Texas Instruments
-
SN74AHCT1G08DBVR
Texas Instruments
Tech Hub
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
LDO regulator guide covering low dropout voltage, power dissipation, thermal design, PSRR, output noise, capacitor stability, adjustable LDO circuits, LDO vs buck converter and datasheet selection chec…
Conditional Access Module guide covering CAM meaning, CI/CI+ interface, smart card authorization, DVB security workflow, TV and set-top box compatibility, internal electronics, ESD protection, connecto…
Guide to electronic component obsolescence covering EOL risk, PCN/PDN notices, last-time buy planning, replacement options, form-fit-function validation, counterfeit risk and BOM lifecycle management.
18650 battery guide covering lithium-ion cell basics, 3.6V/3.7V voltage, 4.2V charging, mAh and Wh capacity, protected cells, chargers, BMS, series-parallel packs, holders, welding and sourcing checks.…
Hall effect sensor guide covering working principle, linear and digital sensors, Arduino circuits, current sensing, speed detection, automotive applications, A3144 examples, signal filtering and datash…

