Nexperia USA Inc. 74AUP3G34GM,125
- Part No.:
- 74AUP3G34GM,125
- Manufacturer:
- Nexperia USA Inc.
- Package:
- 8-XFQFN Exposed Pad
- Datasheet:
-
74AUP3G34GM,125.pdf
- Description:
- IC BUFFER NON-INVERT 3.6V 8XQFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,431
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Product details
Overview
74AUP3G34GM,125 from Nexperia is a low-power triple buffer IC with Schmitt-trigger inputs, operating across 0.8 V to 3.6 V supply, delivering ICC ≤ 0.9 μA max static current, tPD ≤ 4.2 ns (VCC = 3.0 V, CL = 10 pF), and IOFF-enabled partial power-down protection. It is used in battery-powered sensor interfaces and I/O level-shifting circuits where noise immunity and ultra-low quiescent power are critical.
For engineers reviewing the 74AUP3G34GM,125 datasheet, 74AUP3G34GM,125 pinout, 74AUP3G34GM,125 application, or 74AUP3G34GM,125 equivalent, this device supports robust signal conditioning in space-constrained, wide-VCC industrial and portable electronics - especially where input rise/fall time tolerance and backflow current prevention are required.
Technical Context
The 74AUP3G34GM,125 integrates three independent non-inverting buffers, each featuring Schmitt-trigger input thresholds for hysteresis-based noise rejection. Its IOFF circuit actively disables outputs during power-down, blocking damaging backflow currents when VCC = 0 V.
All inputs tolerate voltages up to 3.6 V regardless of VCC level, enabling mixed-voltage domain interfacing. The device complies with JEDEC standards JESD8-12 through JESD8-B and meets HBM ESD > 5000 V and CDM > 1000 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 0.8 V to 3.6 V - enables direct interface with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters. |
| Max Static Supply Current | 0.9 μA at VCC = 3.6 V - ensures negligible battery drain in always-on IoT sensor nodes. |
| Propagation Delay | ≤ 4.2 ns at VCC = 3.0 V, CL = 10 pF - supports clean signal routing in sub-100 MHz digital control paths. |
| IOFF Leakage | ±0.75 μA at VCC = 0 V - prevents cross-talk and bus contention in hot-plug or multi-rail power sequencing. |
| Input Hysteresis | Typical ΔVIH/VIL ≈ 0.3×VCC - rejects high-frequency noise on slow-rising signals from mechanical switches or analog sensors. |
| ESD Rating | HBM > 5000 V, CDM > 1000 V - withstands handling and board-level ESD events without external protection. |
| Operating Temperature | –40 °C to +125 °C - qualified for under-hood automotive modules and industrial motor drives. |
Pinout & Package
XSON8 plastic extremely thin small outline package; no leads; 8 terminals; body 1.35 × 1.0 × 0.35 mm (SOT1203).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1A, 2A, 3A | Data input (buffer A, B, C) | Three independent Schmitt-triggered inputs accepting 0–3.6 V signals regardless of VCC level. |
| 1Y, 2Y, 3Y | Data output (buffer A, B, C) | Non-inverting buffered outputs with rail-to-rail swing and IOFF disable capability. |
| GND | Ground reference | 0 V return path for all internal logic and output drivers; must be low-impedance for noise immunity. |
| VCC | Supply voltage | Primary power rail (0.8–3.6 V); powers all three buffers and IOFF control circuitry. |
Key Features
| Feature | Design Value |
|---|---|
| Wide VCC range | 0.8 V to 3.6 V operation - eliminates need for separate voltage regulators in multi-supply systems. |
| IOFF partial power-down | Outputs disabled with leakage ≤ ±0.75 μA at VCC = 0 V - enables safe insertion/removal in live backplanes. |
| Schmitt-trigger inputs | Hysteresis ≥ 0.3×VCC - suppresses chatter from noisy or slow-switching sources like encoders or thermistors. |
| Ultra-low ICC | 0.9 μA max at full VCC - extends battery life in wearables and remote environmental monitors. |
| High noise immunity | VIH/VIL thresholds track VCC with defined hysteresis - maintains logic integrity in electrically noisy factory floors. |
Applications
| Industrial Sensor Interface | Low-Power MCU GPIO Expansion |
|---|---|
|
Use Scenario: Signal conditioning for analog sensor outputs (e.g., RTD, thermistor) feeding into ADC inputs of an ultra-low-power microcontroller. IC Role / Device Role / Timing Role: Buffer and noise-filtering stage that converts slow, noisy analog-derived logic edges into clean, fast CMOS-compatible signals. Use Value: Enables reliable sampling without external RC filters or Schmitt-trigger discrete components, reducing BOM count and PCB area. |
Use Scenario: Expanding GPIO count on a battery-powered Cortex-M0+ MCU with strict sleep-current budget (e.g., < 1 μA). IC Role / Device Role / Timing Role: Level-shifting and fan-out buffer between MCU I/O and peripheral enable lines (e.g., display backlight, sensor enable). Use Value: Maintains < 0.9 μA static current during deep-sleep mode while preserving signal integrity across 0.8–3.3 V logic transitions. |
| Automotive Body Control Module | USB-C Port Power Sequencing |
|
Use Scenario: Interfacing mechanical switch inputs (door latch, trunk release) to a 3.3 V body controller MCU in under-dash environments (–40 °C to +125 °C). IC Role / Device Role / Timing Role: Robust input conditioner with hysteresis and IOFF, isolating MCU from transients during ignition cycling. Use Value: Eliminates false triggers caused by contact bounce or EMI, and prevents backfeed when VCC is temporarily lost during load-dump events. |
Use Scenario: Controlling power-enable sequencing for USB-C port controllers (e.g., TUSB546, FUSB302) requiring precise timing and voltage-domain isolation. IC Role / Device Role / Timing Role: Synchronized buffer for VCONN/CC line control signals across 1.2 V (controller) and 3.3 V (PMIC) domains. Use Value: Ensures glitch-free enable/disable transitions with sub-5 ns propagation delay and zero cross-rail leakage during hot-swap events. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 74LVC3G34GM,125 | Higher ICC (max 4 μA), no IOFF, VCC min = 1.65 V | Not suitable for partial power-down or sub-1.65 V operation | Select only if higher drive strength (24 mA) is needed and power-down isolation is unnecessary. |
| SN74AUP3G34DCUR | VSSOP8 package (larger footprint), same electrical specs, different pinout (1A/1Y adjacent) | Requires PCB redesign; better thermal dissipation (250 mW vs 200 mW for XSON8) | Choose for manual assembly, test probing, or higher thermal margin - not drop-in replacement. |
Compared with 74LVC3G34GM,125 and SN74AUP3G34DCUR, the 74AUP3G34GM,125 uniquely combines ultra-low ICC, true 0.8 V operation, and IOFF in the smallest XSON8 footprint - making it optimal for miniaturized, battery-sensitive designs requiring guaranteed power-down safety.
Availability
74AUP3G34GM,125 is available at Aetrix Electronics and suitable for industrial sensor interfaces, battery-powered MCU peripherals, and automotive body control modules requiring stable component supply across extended temperature ranges.
Supply support for 74AUP3G34GM,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, analog, and MOSFET solutions for automotive, industrial, and consumer markets.
The 74AUP (Advanced Ultra-low Power) product line targets energy-constrained applications demanding sub-1 μA static current, wide VCC flexibility, and robust IO behavior - especially in portable, sensor, and automotive subsystems.
FAQ
Does 74AUP3G34GM,125 support 0.8 V logic levels reliably?
Yes. The device is fully specified down to 0.8 V VCC, with VIH ≥ 0.70×VCC and VIL ≤ 0.30×VCC at that voltage. Input hysteresis and output drive remain functional across the entire 0.8–3.6 V range, enabling interoperability with emerging ultra-low-voltage MCUs and sensors.
Can 74AUP3G34GM,125 be used in mixed-voltage systems where inputs exceed VCC?
Yes. Inputs accept voltages up to 3.6 V regardless of VCC level (e.g., 3.3 V input into a 1.8 V powered device). This allows safe interfacing between higher-voltage peripherals and lower-voltage controllers without external clamping diodes or level translators.
What is the thermal performance of the SOT1203 (XSON8) package?
The SOT1203 package has a thermal resistance θJA of approximately 220 K/W (typical, still air). At 1.8 V and 10 MHz switching with 10 pF loads, total dynamic power remains below 15 μW - resulting in negligible self-heating even in sealed enclosures.
How does IOFF behave during power sequencing?
When VCC drops below ~0.2 V, the IOFF circuit activates automatically, disabling all outputs and limiting leakage to ±0.75 μA. This prevents reverse current flow from powered downstream buses (e.g., 3.3 V I²C lines) into the unpowered 74AUP3G34GM,125 - protecting both the buffer and upstream devices.
74AUP3G34GM,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 8-XFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 3
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- Push-Pull
- Current - Output High, Low:
- 4mA, 4mA
- Voltage - Supply:
- 0.8V ~ 3.6V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-XQFN (1.6x1.6)
74AUP3G34GM,125 FAQ
1.How can I place an order for 74AUP3G34GM,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP3G34GM,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP3G34GM,125 reliable?
The price and inventory of 74AUP3G34GM,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP3G34GM,125 is usually 5 days.
3.What payment methods are accepted for 74AUP3G34GM,125?
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4.How is shipping managed for 74AUP3G34GM,125?
74AUP3G34GM,125 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP3G34GM,125 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP3G34GM,125?
For technical support, including 74AUP3G34GM,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP3G34GM,125 requirements.
6.How does Aetrix verify that 74AUP3G34GM,125 is sourced from the original manufacturer or authorized distributors?
All 74AUP3G34GM,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP3G34GM,125 meets industry standards.
7.What is the process for return or replacement of 74AUP3G34GM,125?
All 74AUP3G34GM,125 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP3G34GM,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP3G34GM,125 part is unused and in its original packaging.
Return procedure for 74AUP3G34GM,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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