Nexperia USA Inc. 74AXP1G04GXH

Overview

74AXP1G04GXH from Nexperia is a single low-power inverting buffer with Schmitt-trigger inputs, designed for ultra-low-voltage logic interfacing across 0.7 V to 2.75 V supply rails. It delivers 0.5 pF input capacitance, 2.3 pF dynamic power dissipation at 1.2 V, and IOFF-enabled partial power-down protection. It is used in battery-powered sensor nodes and voltage-level translation between sub-1V domains.

For engineers reviewing the 74AXP1G04GXH datasheet, 74AXP1G04GXH pinout, 74AXP1G04GXH application, or 74AXP1G04GXH equivalent, key selection criteria include its 5-terminal X2SON5 package, IOFF leakage <0.5 μA at VCC = 0 V, Schmitt-trigger hysteresis for slow-edge tolerance, and guaranteed operation from –40 °C to +85 °C.

Technical Context

This device implements a single inverter gate with Schmitt-trigger input thresholds (VIH ≥ 0.65VCC, VIL ≤ 0.35VCC) enabling robust noise immunity and compatibility with slow-rising signals. Its IOFF circuit actively disables outputs during power-down, blocking backflow current when VCC = 0 V.

Dynamic performance is characterized by propagation delay as low as 1.0 ns (typ.) at VCC = 2.7 V and load-independent transition times under 1.0 ns. Static power consumption remains below 0.6 μA at 85 °C, supporting always-on IoT edge nodes.

Key Specifications

Pinout & Package

X2SON5 plastic thermal enhanced extremely thin small outline package; no leads; 5 terminals; body 0.8 × 0.8 × 0.32 mm (SOT1226-3).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar inverter applications.

Compared with 74LVC1G04GW and SN74AUP1G04DBVR, the 74AXP1G04GXH uniquely combines sub-1V operation, IOFF, and the smallest industry-standard logic package-making it optimal for miniaturized, multi-rail, battery-constrained systems where leakage and footprint are design-critical.

Availability

74AXP1G04GXH is available at Aetrix Electronics and suitable for industrial sensor interfaces, low-voltage microcontroller I/O expansion, and portable medical device logic requiring stable component supply across long production lifecycles.

Supply support for 74AXP1G04GXH includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert delivering high-performance logic, discrete, and MOSFET solutions optimized for efficiency, reliability, and miniaturization in high-volume applications.

The 74AXP series targets ultra-low-power logic in space- and energy-constrained systems, with emphasis on sub-1V operation, IOFF, and advanced packaging for wearables, IoT endpoints, and battery-powered instrumentation.

FAQ

Does 74AXP1G04GXH support true bidirectional level shifting?

No. It is a unidirectional inverting buffer with fixed input/output roles. While it can translate logic levels across different VCC domains (e.g., 0.8 V input → 1.2 V output), it does not provide automatic direction sensing or bus arbitration. For bidirectional translation, discrete MOSFET-based solutions or dedicated level translators like NXSL0108 must be used.

What is the maximum capacitive load this device can drive reliably?

The device is characterized up to 15 pF load capacitance with guaranteed timing (tpd ≤ 3.1 ns at VCC = 2.7 V). Driving >15 pF increases propagation delay nonlinearly and may cause undershoot exceeding 10% of VCC. For loads >20 pF, add a series resistor (22–47 Ω) near the output to damp ringing and maintain signal integrity.

Can the n.c. pin on the X2SON5 package be grounded or left floating?

Pin 1 is explicitly marked "not connected" in the datasheet and has no internal connection. It may be left floating or grounded per PCB layout convenience-neither affects electrical performance. However, grounding improves mechanical stability during reflow and reduces potential for solder bridging in high-density layouts.

How does the Schmitt-trigger input improve noise immunity compared to standard CMOS inputs?

The Schmitt-trigger provides hysteresis: VIH ≈ 0.65VCC and VIL ≈ 0.35VCC, creating a ~30% VCC noise margin. This prevents multiple toggles during slow signal transitions (e.g., from RC circuits or long traces), unlike standard CMOS inputs that switch at ~0.5VCC with no hysteresis and are prone to oscillation near threshold.