Nexperia USA Inc. 74AXP1G10GSH

Overview

74AXP1G10GSH from Nexperia is a single 3-input NAND gate with Schmitt-trigger inputs, operating across 0.7 V to 2.75 V supply voltage, delivering propagation delay as low as 0.9 ns (at VCC = 2.3–2.7 V), input capacitance of 0.5 pF, and IOFF-enabled partial power-down capability for system-level power gating in battery-sensitive applications.

For engineers reviewing the 74AXP1G10GSH datasheet, 74AXP1G10GSH pinout, 74AXP1G10GSH application, or 74AXP1G10GSH equivalent, this device is selected for ultra-low-power logic interfacing in portable sensor nodes, I²C bus level-shifting, wake-up signal conditioning, and always-on subsystem control where rail-to-rail input tolerance and sub-1 µA static current at 85 °C are critical.

Technical Context

This device implements a true 3-input NAND function with Schmitt-trigger hysteresis on all inputs (typical ΔV = 0.15 × VCC), enabling robust noise immunity against slow-rising signals in noisy environments. Its IOFF circuit actively disables output leakage when VCC = 0 V, supporting hot-insertion and multi-rail sequencing.

Dynamic performance is characterized by load-independent propagation delay (tpd) down to 0.9 ns and transition time (tt) ≤1.0 ns at VCC = 2.7 V, while static operation maintains ICC ≤0.6 µA at 85 °C - verified across −40 °C to +85 °C ambient range.

Key Specifications

Pinout & Package

XSON6 package (SOT1202): ultra-thin, leadless, 1.0 mm × 1.0 mm × 0.35 mm body with 6 terminals; pin 1 indicator located at lower-left corner below marking code.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 3-input NAND gate applications.

Compared with SN74LVC1G10DBVR and 74LVC1G10GW,125, the 74AXP1G10GSH uniquely combines sub-1 V operation, Schmitt-trigger noise immunity, and IOFF - making it the only choice for battery-constrained, multi-rail, or EMI-prone designs requiring guaranteed glitch-free logic decisions.

Availability

74AXP1G10GSH is available at Aetrix Electronics and suitable for IoT sensor node wake-up logic, I²C bus level-shifting interface, and portable medical device power sequencing requiring stable component supply across industrial temperature grades and long-lifecycle production programs.

Supply support for 74AXP1G10GSH includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, discrete, and MOSFET solutions - serving automotive, industrial, and consumer markets with JEDEC-qualified components.

The AXP logic family targets ultra-low-power, wide-VCC applications including battery-operated devices and multi-voltage system interfaces - designed specifically for energy efficiency without sacrificing speed or noise immunity.

FAQ

Does 74AXP1G10GSH support true 0 V to VCC input voltage range?

Yes. Inputs accept voltages from 0 V to 2.75 V regardless of VCC level, enabling direct connection to higher-voltage sources (e.g., 3.3 V GPIO) even when operating at 0.7 V. This is confirmed in Table 6 (VI range: 0 to 2.75 V) and Table 7 (VIH/VIL defined proportionally to VCC).

Can 74AXP1G10GSH be used in partial power-down mode with VCC = 0 V while other rails remain active?

Yes. The IOFF circuit activates automatically when VCC = 0 V, disabling the output and limiting backflow current to ≤0.01 µA (Table 7, IOFF parameter). This is validated per JESD78 Class II latch-up testing and supports hot-swap and rail-isolation use cases.

What is the maximum recommended load capacitance for maintaining specified propagation delay?

The datasheet specifies tpd values with CL = 5 pF (Table 10 test condition). Figure 7–11 show tpd increases linearly with CL up to 50 pF; for delays ≤1.5 ns at VCC = 1.8 V, CL must be ≤15 pF. Output drive strength (8 mA sink/source at VCC = 2.3 V) supports moderate capacitive loads without external buffers.

Is the Schmitt-trigger hysteresis voltage fixed or VCC-dependent?

Hysteresis is VCC-dependent: typical ΔV = 0.15 × VCC (derived from VIH–VIL differences in Table 7). At VCC = 1.2 V, hysteresis ≈180 mV; at VCC = 2.5 V, ≈375 mV. This scaling ensures consistent noise margin across the full 0.7–2.75 V operating range.