Nexperia USA Inc. 74AXP1G14GXH

Overview

74AXP1G14GXH from Nexperia is a single-channel Schmitt trigger inverter optimized for ultra-low-power operation across 0.7 V to 2.75 V supply rails. It converts slow-rising/falling input signals into clean, jitter-free digital outputs with hysteresis (VH = 0.2–1.0 V), supports partial power-down via IOFF circuitry, and operates from –40 °C to +85 °C in battery-powered sensor interfaces and IoT edge nodes.

For engineers reviewing the 74AXP1G14GXH datasheet, 74AXP1G14GXH pinout, 74AXP1G14GXH application, or 74AXP1G14GXH equivalent, key selection criteria include its sub-1 μA static ICC at 85 °C, 0.5 pF input capacitance, IOFF-enabled backflow prevention during power sequencing, and compatibility with JEDEC voltage standards JESD8-12A.01 through JESD8-5A.01.

Technical Context

This device implements a CMOS-based Schmitt trigger input stage with asymmetric threshold voltages (VT+ = 0.3VCC–1.7 V; VT− = 0.2VCC–1.5 V) to reject noise on slow analog-like inputs. Its IOFF feature actively disables output terminals when VCC = 0 V, blocking reverse current flow up to ±20 mA while maintaining input tolerance to 2.75 V independent of supply state.

Dynamic performance is characterized by propagation delay tpd = 1.0–35 ns depending on VCC and load, transition time tt ≤ 1.0 ns at 2.7 V, and low dynamic capacitance (CPD = 2.4 pF typical at 1.2 V), enabling reliable signal conditioning in high-density, low-voltage logic domains without added buffering.

Key Specifications

Pinout & Package

X2SON5 package: plastic thermal-enhanced extremely thin small outline, no leads, 5 terminals, body size 0.8 × 0.8 × 0.32 mm (SOT1226-3).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar Schmitt trigger inverter applications.

Compared with SN74LVC1G14DBVR and 74LVC1G14GW,125, the 74AXP1G14GXH uniquely delivers sub-1 μA static current, guaranteed IOFF functionality, and smallest 0.8 × 0.8 mm X2SON5 footprint-making it the sole option for space-constrained, multi-rail, battery-operated designs requiring true power-gating safety.

Availability

74AXP1G14GXH is available at Aetrix Electronics and suitable for industrial sensor interfaces, wearable biometric front-ends, and IoT node power sequencing requiring stable component supply, long-term lifecycle assurance, and consistent parametric performance across temperature and voltage corners.

Supply support for 74AXP1G14GXH includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert delivering high-performance logic, analog, and MOSFET solutions with focus on efficiency, reliability, and miniaturization for consumer, industrial, and automotive markets.

The 74AXP series targets ultra-low-power, wide-VCC logic applications where energy efficiency, small form factor, and robust signal integrity are critical-especially in battery-powered and thermally constrained edge devices.

FAQ

Can 74AXP1G14GXH operate with VCC = 0.7 V while driving a 15 pF load?

Yes. At VCC = 0.7 V, the device maintains functional operation with tpd ≤ 35 ns and VOL ≤ 0.5 V under 2 mA load, as verified in Table 7 and Figure 13. The 15 pF load falls within the tested CL range (0–140 pF), and propagation delay remains within specification across –40 °C to +85 °C ambient.

What is the maximum allowable input voltage when VCC = 0 V?

The absolute maximum input voltage is +3.3 V (per Table 5), and the device tolerates VI = 0–2.75 V during normal operation (Table 6). When VCC = 0 V, the IOFF circuit isolates the output, but inputs remain rated to 2.75 V - confirmed by VI specification and ESD test conditions in Section 2.

Does 74AXP1G14GXH require external pull-up or pull-down resistors on input A?

No. The Schmitt trigger input has no internal bias; however, external termination is required only if the source is high-impedance or floating. With driven logic sources (e.g., MCU GPIO), no external resistors are needed - the 0.5 pF CI and defined VT+/VT− thresholds ensure clean switching without added components.

How does the IOFF feature behave during VCC ramp-up from 0 V to 2.75 V?

IOFF remains active until VCC exceeds ~0.5 V, at which point output Y transitions from high-impedance to functional drive. This behavior is characterized in Table 7 (IOFF and ΔIOFF parameters) and ensures no output contention or back-current during power sequencing - critical for mixed-supply system initialization.