Nexperia USA Inc. 74AXP1G86GXH

Overview

74AXP1G86GXH from Nexperia is a single 2-input EXCLUSIVE-OR gate with Schmitt-trigger inputs, operating from 0.7 V to 2.75 V supply, delivering 0.9 ns typical propagation delay at 2.7 V and 0.6 μA maximum ICC at 85 °C for ultra-low-power logic in space-constrained portable systems.

For engineers reviewing the 74AXP1G86GXH datasheet, 74AXP1G86GXH pinout, 74AXP1G86GXH application, or 74AXP1G86GXH equivalent, this device supports partial power-down (IOFF), tolerates slow input edges, and targets battery-powered sensor interfaces, level-shifting data paths, and low-voltage control signal conditioning where static current and input hysteresis are critical.

Technical Context

This logic gate implements true XOR Boolean function (Y = A ⊕ B) with Schmitt-trigger inputs that provide hysteresis-ensuring noise immunity and clean switching even with slow-rising signals. It uses advanced AXP low-power CMOS process optimized for sub-1 V operation.

The IOFF circuit actively disables output leakage when VCC = 0 V, preventing backflow current in partial power-down systems. Input voltage tolerance up to 2.75 V enables interfacing across mixed-supply domains without external level shifters.

Key Specifications

Pinout & Package

X2SON5 plastic thermal enhanced extremely thin small outline package; no leads; 5 terminals; body 0.8 × 0.8 × 0.32 mm (SOT1226-3).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 2-input XOR gate applications.

Compared with SN74LVC1G86DBVR and 74LVC1G86GW,125, the 74AXP1G86GXH uniquely combines sub-1 V operation, Schmitt-trigger noise rejection, and IOFF-enabled power sequencing-making it the only option for ultra-low-power, mixed-voltage, and partial-sleep system architectures.

Availability

74AXP1G86GXH is available at Aetrix Electronics and suitable for wireless sensor nodes, USB-C power delivery subsystems, wearable health monitors, and industrial PLC I/O modules requiring stable component supply across extended temperature and ultra-low-power constraints.

Supply support for 74AXP1G86GXH includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, analog, and discrete components for automotive, industrial, and mobile markets.

The AXP logic family delivers ultra-low-power, wide-VCC-range digital functions specifically engineered for energy-harvesting systems, battery-constrained wearables, and mixed-voltage interface bridging.

FAQ

Can 74AXP1G86GXH operate with VCC = 0.7 V while accepting 1.8 V inputs?

Yes. The device supports input voltages up to 2.75 V independent of VCC, verified per Table 6 (VI input voltage range: 0 to 2.75 V). At VCC = 0.7 V, VIH is 0.75×VCC = 0.525 V, ensuring reliable HIGH detection of 1.8 V signals without level shifting.

What is the maximum load capacitance supported at 2.7 V supply?

At VCC = 2.7 V, the propagation delay remains ≤4.3 ns up to 15 pF total load capacitance (CL), as confirmed by Fig. 8 and Table 8. Exceeding 15 pF increases tpd nonlinearly and may violate timing margins in high-speed clock/data paths.

Does the IOFF feature require external biasing or control signals?

No. IOFF activates automatically when VCC = 0 V. No external enable/disable pin or resistor network is needed-the internal circuitry detects VCC collapse and disables output drivers within nanoseconds, preventing back-current without design overhead.

How does the Schmitt-trigger input improve performance over standard CMOS inputs?

Schmitt-trigger inputs provide ~100 mV hysteresis (VIH − VIL), rejecting noise spikes and slow-rising interference that would cause multiple toggles on standard gates. This eliminates need for external RC filtering in applications like mechanical switch debouncing or low-SNR sensor signal conditioning.