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Nexperia USA Inc. 74AXP1G97GMH

Part No.:
74AXP1G97GMH
Manufacturer:
Nexperia USA Inc.
Category:
Gates and Inverters - Multi-Function, Configurable
Package:
6-XFDFN
Datasheet:
Aetrix74AXP1G97GMH.pdf
Description:
IC GATE MULTI-FUNCTION XSON6
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:4,999

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Product details

Overview

74AXP1G97 from Nexperia is a low-power configurable multiple-function logic gate with Schmitt-trigger inputs, supporting MUX, AND, OR, NAND, NOR, inverter, and buffer configurations in a single 6-pin XSON package. It operates across 0.7 V–2.75 V supply, delivers <0.6 μA static ICC at 85 °C, features IOFF for partial power-down protection, and targets space-constrained battery-powered and ultra-low-power digital control nodes.

For engineers reviewing the 74AXP1G97 datasheet, 74AXP1G97 pinout, 74AXP1G97 application, or 74AXP1G97 equivalent, key selection criteria include its wide VCC range, sub-1 pF input/output capacitance, Schmitt-trigger noise immunity, IOFF-enabled system-level power sequencing, and compatibility with 1.2 V/1.8 V/2.5 V logic domains in portable and IoT edge devices.

Technical Context

The 74AXP1G97 implements a reconfigurable logic cell using three data inputs (A, B, C), one output (Y), and ground/supply terminals-enabling function selection via external wiring per Figure 5–11. Its Schmitt-trigger inputs provide hysteresis (0.2–1.0 V) and support direct VCC/GND connection without pull resistors.

IOFF circuitry actively disables outputs when VCC = 0 V, limiting backflow current to ±0.1 μA and enabling hot-swap and multi-rail power management. The device complies with JEDEC standards JESD8-12A.01 through JESD8-5A.01 and meets HBM >2000 V / CDM >1000 V ESD requirements.

Key Specifications

Parameter Value and Actual Design Meaning
VCC Range 0.7 V to 2.75 V - supports single-supply operation across 1.2 V, 1.8 V, and 2.5 V logic families without level shifters
ICC (max) 0.6 μA at 85 °C - enables multi-year battery life in always-on sensor nodes and wearables
IOFF Leakage ±0.1 μA at VCC = 0 V - prevents destructive back-current during partial power-down in mixed-voltage systems
Input Capacitance 0.5 pF typical - minimizes signal loading and timing skew in high-speed routing on dense PCBs
Propagation Delay 1.1 ns to 148 ns depending on VCC and load - scales predictably from 2.7 V (1.1 ns min) to 0.75 V (148 ns max)
Threshold Hysteresis 0.2 V to 1.0 V - rejects >10% VCC noise on slow or noisy control lines (e.g., pushbuttons, analog sensor outputs)
ESD Rating HBM >2000 V, CDM >1000 V - eliminates need for external ESD protection in handheld and industrial UI interfaces

Pinout & Package

XSON6 plastic extremely thin small outline package (SOT886): 1 × 1.45 × 0.5 mm body, no leads, 6 terminals, wettable flank compatible.

Pin/Terminal Circuit Role Design Meaning
B Data input Configurable logic operand; accepts 0–2.75 V regardless of VCC; Schmitt-triggered
GND Ground reference 0 V return path for all internal circuitry and IOFF control; must be low-impedance
A Data input Primary logic operand; tied directly to VCC/GND for fixed logic levels in MUX/AND/NOR modes
Y Data output Active-drive CMOS output; IOFF disables output state when VCC = 0 V
VCC Supply voltage Power rail for logic core and I/O; IOFF activation threshold is VCC = 0 V ±100 mV
C Data input Select/control input in MUX mode; inverted input in OR/NAND/NOR configurations per Fig. 7–8

Key Features

Feature Design Value
Configurable logic function Single device replaces 7 discrete gates (MUX, AND, OR, NAND, NOR, inverter, buffer) - reduces BOM count and board area
IOFF partial power-down Output high-impedance state activated automatically at VCC = 0 V - enables safe insertion/removal in live backplanes
Schmitt-trigger inputs Input hysteresis ≥0.2 V across full VCC range - eliminates contact bounce and EMI-induced glitches on mechanical switches
Ultra-low dynamic power CPD = 2.6 pF at VCC = 1.2 V - cuts switching power by >50% vs. standard AXP-series gates at same frequency
Wide VCC compatibility Operates from 0.7 V (sub-threshold) to 2.75 V (2.5 V logic) - supports energy harvesting and multi-rail SoC interfaces

Applications

IoT Sensor Node Control Portable Device Power Sequencing

Use Scenario: Managing wake-up signals from multiple low-power sensors (e.g., accelerometer, ambient light, button) into a single MCU interrupt line.

IC Role / Device Role / Timing Role: Configured as 3-input OR gate with Schmitt-trigger inputs to debounce and aggregate asynchronous event sources.

Use Value: Eliminates external RC filters and discrete diodes; IOFF prevents leakage when MCU is asleep and VCC is gated.

Use Scenario: Enabling/disabling subsystem power rails (e.g., display, radio, audio codec) based on host processor commands.

IC Role / Device Role / Timing Role: Used as an active-high buffer with IOFF to isolate downstream rails during host power-down sequences.

Use Value: Prevents backfeed current from powered peripherals into a shut-down processor domain, ensuring clean power-state transitions.

Industrial Pushbutton Interface Wearable Device Mode Switching

Use Scenario: Converting noisy mechanical switch closures into clean digital control signals for PLC I/O modules or HMI controllers.

IC Role / Device Role / Timing Role: Configured as inverter with Schmitt-trigger input to reject EMI and contact chatter in factory environments.

Use Value: Achieves >99.9% reliable edge detection without firmware debouncing or external filtering components.

Use Scenario: Selecting between BLE advertising, connected, and deep-sleep modes based on user gesture or motion trigger.

IC Role / Device Role / Timing Role: Configured as 2-input MUX to route either motion-interrupt or timer-expiry signal to MCU wake pin.

Use Value: Reduces active-mode current by 12 μA vs. dual-gate solution; 0.5 pF input capacitance preserves signal integrity on flex PCB traces.

Equivalent & Alternatives

The following parts are listed as comparable options for similar configurable logic gate applications.

Alternative Part Technical Difference Application Difference Selection Advice
SN74LVC1G97 Higher ICC (10 μA max at 85 °C); no IOFF; VCC min = 1.65 V Not suitable for sub-1.65 V or partial power-down systems Choose only if operating strictly at 1.8 V/3.3 V with no power sequencing constraints
74LVC1G57 Same pinout but lacks Schmitt-trigger inputs; higher input capacitance (3.5 pF) Poor noise immunity on long traces or mechanical inputs; requires external filtering Select only for clean, short-trace digital routing where hysteresis is unnecessary

Compared with SN74LVC1G97 and 74LVC1G57, the 74AXP1G97 uniquely combines ultra-low static current, true partial power-down capability, and robust Schmitt-trigger noise rejection-making it the sole option for battery-critical, multi-rail, or noisy-environment logic interface tasks.

Availability

74AXP1G97 is available at Aetrix Electronics and suitable for IoT sensor nodes, portable device power sequencing, industrial pushbutton interfaces, and wearable device mode switching requiring stable component supply across extended temperature and voltage ranges.

Supply support for 74AXP1G97 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance logic, analog, and MOSFET solutions for automotive, industrial, and consumer markets.

The AXP logic family targets ultra-low-power, wide-VCC digital interfacing-designed specifically for energy-constrained edge devices, battery-operated sensors, and multi-voltage system integration.

FAQ

Can the 74AXP1G97 be used with 0.8 V supply?

Yes. The device is fully specified down to 0.7 V VCC, with propagation delay of 148 ns (max) and VIH/VIL thresholds scaling to 0.3×VCC at 0.75–0.85 V. Input hysteresis remains functional, and IOFF activates reliably at VCC = 0 V.

How does IOFF protect the device during power-down?

When VCC drops to 0 V, the IOFF circuit forces Y into high-impedance state, limiting backflow current to ±0.1 μA even if Y is pulled to 2.75 V externally. This prevents latch-up and cross-talk in live-backplane or hot-swap scenarios.

What is the maximum capacitive load the 74AXP1G97 can drive?

The device drives up to 15 pF while maintaining tpd ≤ 3.5 ns at VCC = 2.7 V (Fig. 15). At lower VCC (e.g., 1.2 V), load should be limited to ≤5 pF for tpd ≤ 14 ns. Exceeding recommended CL increases delay nonlinearly and may degrade noise margin.

Is the 74AXP1G97 pin-compatible with other XSON6 logic gates?

Yes-pin 1 (B), pin 2 (GND), pin 3 (A), pin 4 (Y), pin 5 (VCC), pin 6 (C) matches industry-standard XSON6 logic gate layout (e.g., 74LVC1Gxx series). However, functional behavior differs due to Schmitt-trigger inputs and IOFF, requiring schematic review before drop-in replacement.

74AXP1G97GMH Specifications

Product attributes
Attribute value
Manufacturer:
Nexperia USA Inc.
Series:
74AXP
Package/Case:
6-XFDFN
Packaging:
Tape & Reel (TR)
Product Status:
Obsolete
Logic Type:
Configurable Multiple Function
Number of Circuits:
1
Number of Inputs:
3
Schmitt Trigger Input:
Yes
Output Type:
Single-Ended
Current - Output High, Low:
8mA, 8mA
Voltage - Supply:
0.7V ~ 2.75V
Operating Temperature:
-40°C ~ 85°C
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
6-XSON, SOT886 (1.45x1)

74AXP1G97GMH FAQ

1.How can I place an order for 74AXP1G97GMH through Aetrix?

Please submit a Request for Quotation (RFQ) for 74AXP1G97GMH on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 74AXP1G97GMH reliable?

The price and inventory of 74AXP1G97GMH are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AXP1G97GMH is usually 5 days.

3.What payment methods are accepted for 74AXP1G97GMH?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AXP1G97GMH transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for 74AXP1G97GMH?

74AXP1G97GMH orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 74AXP1G97GMH order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 74AXP1G97GMH?

For technical support, including 74AXP1G97GMH datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AXP1G97GMH requirements.

6.How does Aetrix verify that 74AXP1G97GMH is sourced from the original manufacturer or authorized distributors?

All 74AXP1G97GMH products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AXP1G97GMH meets industry standards.

7.What is the process for return or replacement of 74AXP1G97GMH?

All 74AXP1G97GMH units undergo pre-shipment inspection (PSI). If there is an issue with 74AXP1G97GMH, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 74AXP1G97GMH part is unused and in its original packaging.

Return procedure for 74AXP1G97GMH:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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