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Nexperia USA Inc. 74AXP1T125GSH
- Part No.:
- 74AXP1T125GSH
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Translators, Level Shifters
- Package:
- Datasheet:
-
74AXP1T125GSH.pdf
- Description:
- IC TRANSLTR UNIDIRECTIONAL 6XSON
- Quantity:
- Payment:
- Shipping:
Inventory:1,765
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Product details
Overview
74AXP1T125 from Nexperia is a dual-supply non-inverting 3-state buffer/line driver with independent input (VCCI) and output (VCCO) rails, enabling voltage-level translation between 0.7–2.75 V and 1.2–5.5 V domains. It features Schmitt-trigger inputs for noise immunity, IOFF circuitry for partial power-down protection, and operates across –40 °C to +85 °C in ultra-compact XSON6/X2SON6 packages. Used in mixed-voltage I/O interfacing on FPGA, MCU, and ASIC boards.
For engineers reviewing the 74AXP1T125 datasheet, 74AXP1T125 pinout, 74AXP1T125 application, or 74AXP1T125 equivalent, key selection criteria include dual-rail voltage translation capability, sub-1 pF input capacitance, IOFF-enabled system-level power sequencing, and verified JEDEC compliance across five logic families (JESD8-12A.01 through JESD12-6).
Technical Context
The device implements a single-channel non-inverting buffer with active-low 3-state control via OE, where HIGH on OE forces Y into high-impedance. Input logic thresholds are referenced to VCCI and scale with supply (e.g., VIH = 0.65×VCCI at 1.1–1.95 V), while output drive strength and VOH/VOL are referenced to VCCO and specified per load current (e.g., VOH ≥ 1.05 V at IO = –2 mA, VCCO = 1.2 V).
Its IOFF architecture actively disables both input and output paths when either supply is near 0 V, limiting backflow current to ≤ ±0.5 μA and meeting JESD78D Class II latch-up immunity (>100 mA). Dynamic performance is characterized across six VCCO ranges (1.2 V to 5.0 V) and four VCCI bands, with propagation delay as low as 1.9 ns (VCCI = 2.3–2.7 V, VCCO = 5.0 V, Tamb = 25 °C).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCCI Range | 0.7 V to 2.75 V - Enables interface with ultra-low-voltage cores (e.g., 0.8 V FPGA I/O, 1.2 V ARM subsystems) |
| VCCO Range | 1.2 V to 5.5 V - Supports legacy 3.3 V/5 V peripherals and modern 1.8 V/2.5 V buses without level-shifter ICs |
| Input Capacitance (CI) | 0.6 pF typical - Minimizes signal loading on high-speed, low-drive sources like sensor outputs or clock distribution nets |
| IOFF Leakage | ≤ ±0.5 μA at 85 °C - Ensures safe hot-plug operation and prevents bus contention during partial power-down sequences |
| Propagation Delay (tpd) | 1.9 ns min (VCCI=2.5 V, VCCO=5.0 V) - Meets timing closure for >500 MHz data paths in DDR I/O and serial link bridging |
| ESD Robustness | HBM >2 kV, CDM >1000 V - Satisfies industrial handling requirements without external protection diodes |
| Operating Temperature | –40 °C to +85 °C - Qualified for automotive body electronics, industrial PLCs, and outdoor edge computing nodes |
Pinout & Package
XSON6 (SOT886/SOT1115/SOT1202) and X2SON6 (SOT1255-2) packages: 6-terminal, leadless, ultra-thin outline (body height ≤ 0.35 mm); thermal-enhanced variant available.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCCI | Input supply rail | Reference for A and OE logic thresholds; must be stable before enabling device |
| GND | Ground reference | Common return for both supply domains; requires low-inductance connection to minimize ground bounce |
| A | Data input | Schmitt-triggered; accepts voltages up to 2.75 V regardless of VCCI setting |
| Y | Non-inverting buffered output | 3-state capable; driven from VCCO; supports 12 mA sink/source at 3.3 V |
| OE | Output enable (active-HIGH) | Asserting HIGH places Y in high-Z; compatible with standard GPIO or bus controller signals |
| VCCO | Output supply rail | Determines output voltage swing and drive strength; decoupling required within 1 mm of pin |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent supply rails | VCCI and VCCO operate over non-overlapping, wide voltage ranges-enables seamless 0.8 V ↔ 3.3 V or 1.2 V ↔ 5.0 V translation without external components |
| IOFF partial power-down | Prevents damaging back-current flow when VCCI or VCCO is powered off independently-critical for modular systems with staggered power sequencing |
| Schmitt-trigger inputs | Input hysteresis ≥ 0.3×VCCI improves noise margin against slow-rising signals from mechanical switches or long PCB traces |
| Ultra-low dynamic capacitance | CI = 0.6 pF and CO = 1.8 pF reduce switching power and signal distortion in high-frequency data lines (e.g., MIPI D-PHY, SPI, I²C) |
| JEDEC-compliant logic levels | Validated across five industry standards (JESD8-12A.01 to JESD12-6)-ensures interoperability with memory controllers, PMICs, and mixed-vendor SoCs |
Applications
| Industrial Sensor Interface | FPGA I/O Bridging |
|---|---|
Use Scenario: Connecting 1.8 V analog sensor outputs to a 3.3 V microcontroller ADC input while maintaining signal integrity and ESD robustness. IC Role / Device Role / Timing Role: Level-translating buffer isolating domains; provides Schmitt-triggered input conditioning and 3-state isolation during MCU sleep mode. Use Value: Eliminates need for discrete MOSFET translators; IOFF prevents sensor-side leakage when MCU is powered down. | Use Scenario: Interfacing a 0.85 V FPGA core I/O bank to a 2.5 V Ethernet PHY transceiver with precise timing alignment. IC Role / Device Role / Timing Role: Non-inverting buffer with <1.9 ns tpd ensures setup/hold timing margins for 100 Mbps MII interfaces. Use Value: Sub-2 ns propagation delay and 0.6 pF CI preserve signal edge rates, reducing jitter accumulation across multi-stage routing. |
| Automotive Body Control Module | USB-C Power Delivery Negotiation |
Use Scenario: Translating 1.2 V CAN FD controller logic signals to 5.0 V LIN bus drivers in a vehicle door module. IC Role / Device Role / Timing Role: Voltage-level translator with HBM >2 kV ESD rating; OE controlled by MCU to isolate LIN bus during firmware updates. Use Value: Single-chip solution meets AEC-Q100 Grade 2 temperature range and eliminates discrete resistor-divider networks. | Use Scenario: Isolating USB-C CC line communication between a 1.2 V USB PD controller and 3.3 V system management unit. IC Role / Device Role / Timing Role: Bidirectional-capable buffer (via OE control) supporting USB PD 3.0 variable voltage negotiation signaling. Use Value: Dual-rail operation allows direct connection to PD controller's low-voltage domain while driving 3.3 V logic thresholds reliably. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-supply buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TXS0102DCUR | Auto-direction sensing; no OE pin; higher IOZ (±5 μA); VCCA/VCCB = 1.2–3.6 V only | Unidirectional use cases require external OE logic; unsuitable for strict 3-state control or >3.6 V VCCO | Select when automatic direction detection is needed and VCCO ≤ 3.6 V; avoid for precise OE-timed bus arbitration. |
| SN74AVC2T244RSWR | Two-channel; push-pull output; no Schmitt trigger; IOFF not supported; VCCA/VCCB = 1.2–3.6 V | Lacks IOFF and Schmitt inputs-requires external ESD protection and cannot safely interface with unpowered systems | Choose for cost-sensitive, non-hot-plug dual-channel applications where VCCO ≤ 3.6 V and noise immunity is secondary. |
Compared with TXS0102DCUR and SN74AVC2T244RSWR, the 74AXP1T125 uniquely combines explicit OE control, IOFF protection, Schmitt inputs, and extended 5.5 V VCCO support-making it the only option qualified for mixed-voltage hot-swap interfaces requiring guaranteed high-Z isolation and robust ESD tolerance.
Availability
74AXP1T125 is available at Aetrix Electronics and suitable for industrial sensor interfaces, FPGA I/O bridging, automotive body control modules, and USB-C power delivery negotiation requiring stable component supply across extended temperature and mixed-voltage environments.
Supply support for 74AXP1T125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance logic, discrete, and MOSFET solutions for automotive, industrial, and consumer markets.
The 74AXP series targets ultra-low-power, mixed-voltage digital interfacing-designed specifically for space-constrained, thermally sensitive applications where voltage translation, IOFF safety, and minimal capacitive loading are critical.
FAQ
What is the maximum allowable voltage difference between VCCI and VCCO?
VCCI and VCCO may operate at any combination within their respective rated ranges (VCCI: 0.7–2.75 V; VCCO: 1.2–5.5 V), with no absolute differential limit specified. However, absolute maximum ratings restrict VCCI to ≤3.3 V and VCCO to ≤6.0 V relative to GND. Simultaneous operation at VCCI = 2.75 V and VCCO = 5.5 V is fully supported and validated per datasheet Table 5.
Does the 74AXP1T125 support true bidirectional level translation?
No-it is a unidirectional non-inverting buffer with separate input and output supplies. Bidirectional operation requires external control of OE to manage direction, and the device does not auto-detect signal direction like dedicated translators (e.g., TXB0102). Its primary role is level-shifted output driving, not passive bus coupling.
How does the IOFF feature behave when only VCCI is powered?
When VCCI = 0 V and VCCO > 0 V, the IOFF circuit disables both input and output paths, limiting ICCI and ICCO to ≤ ±0.5 μA (85 °C max) and preventing back-current from VCCO into the unpowered input domain. This behavior is explicitly tested and guaranteed per datasheet Table 7 (IOFF and ΔIOFF parameters).
Can the Schmitt-trigger inputs accept 3.3 V signals while VCCI is set to 1.2 V?
No-the absolute maximum input voltage is clamped to VCCI + 0.3 V (per Table 5: VI ≤ 3.3 V max, but VI ≤ VCCI + 0.3 V is implied by safe operating area). At VCCI = 1.2 V, VI must remain ≤ 1.5 V. The datasheet states "Inputs accept voltages up to 2.75 V" only when VCCI is itself ≥ 2.75 V; exceeding VCCI by more than 0.3 V risks damage or undefined behavior.
74AXP1T125GSH Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AXP
- Package/Case:
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Translator Type:
- Voltage Level
- Channel Type:
- Unidirectional
- Number of Circuits:
- 1
- Channels per Circuit:
- 1
- Voltage - VCCA:
- 0.7 V ~ 2.75 V
- Voltage - VCCB:
- 1.2 V ~ 5.5 V
- Input Signal:
- -
- Output Signal:
- -
- Output Type:
- Tri-State
- Data Rate:
- -
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Features:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-XFDFN
74AXP1T125GSH FAQ
1.How can I place an order for 74AXP1T125GSH through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AXP1T125GSH on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AXP1T125GSH reliable?
The price and inventory of 74AXP1T125GSH are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AXP1T125GSH is usually 5 days.
3.What payment methods are accepted for 74AXP1T125GSH?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AXP1T125GSH transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AXP1T125GSH?
74AXP1T125GSH orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AXP1T125GSH order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AXP1T125GSH?
For technical support, including 74AXP1T125GSH datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AXP1T125GSH requirements.
6.How does Aetrix verify that 74AXP1T125GSH is sourced from the original manufacturer or authorized distributors?
All 74AXP1T125GSH products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AXP1T125GSH meets industry standards.
7.What is the process for return or replacement of 74AXP1T125GSH?
All 74AXP1T125GSH units undergo pre-shipment inspection (PSI). If there is an issue with 74AXP1T125GSH, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AXP1T125GSH part is unused and in its original packaging.
Return procedure for 74AXP1T125GSH:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74AXP1T125GSH Tags
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