Nexperia USA Inc. 74AXP1T32GWH

Overview

74AXP1T32 from Nexperia is a dual-supply 2-input OR gate with independent input (VCCI) and output (VCCO) supply rails, enabling bidirectional voltage-level translation between 0.7 V–2.75 V and 1.2 V–5.5 V domains. It features Schmitt-trigger inputs for noise immunity, IOFF circuitry for partial power-down protection, and operates across –40 °C to +85 °C in ultra-compact XSON6/X2SON6 packages. Used in mixed-voltage I/O bridging between legacy low-voltage logic and modern higher-voltage peripherals.

For engineers reviewing the 74AXP1T32 datasheet, 74AXP1T32 pinout, 74AXP1T32 application, or 74AXP1T32 equivalent, this page delivers verified electrical specifications, package-validated pin functions, real-world level-shifting use cases, and cross-manufacturer alternatives with documented functional alignment and voltage-domain constraints.

Technical Context

The device implements a single 2-input OR logic function with physically separated input and output supply domains: inputs A and B are referenced to VCCI (0.7–2.75 V), while output Y is referenced to VCCO (1.2–5.5 V). Its Schmitt-trigger input thresholds scale with VCCI, ensuring robust operation under slow-rising signals and high-noise environments.

IOFF circuitry actively disables the output stage when either supply is at 0 V, blocking backflow current during partial power-down - a critical requirement for hot-swap and battery-backed subsystems. Static current remains below 0.5 μA (ICCI) and 1.8 μA (ICCO) at 85 °C, supporting ultra-low-power always-on interfaces.

Key Specifications

Pinout & Package

XSON6 (SOT886/SOT1202) and X2SON6 (SOT1255-2) packages: 6-terminal, leadless, ultra-thin outlines (1.0 × 1.45 × 0.5 mm down to 1.0 × 0.8 × 0.32 mm) optimized for space-constrained PCB layouts and thermal performance.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-supply OR gate applications.

Compared with TXS0102 and SN74LVC1T32, the 74AXP1T32 uniquely delivers native OR logic with independent rail control, Schmitt noise rejection, and guaranteed IOFF shutdown - making it the only choice for mixed-voltage combinational logic requiring robust power sequencing and signal integrity.

Availability

74AXP1T32 is available at Aetrix Electronics and suitable for industrial sensor interfaces, low-power wearable I/O bridges, FPGA configuration bus isolation, and legacy microcontroller upgrade paths requiring stable component supply and long-term lifecycle assurance.

Supply support for 74AXP1T32 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert delivering high-performance logic, analog, and MOSFET solutions with emphasis on efficiency, reliability, and miniaturization for industrial, automotive, and consumer applications.

The 74AXP series targets ultra-low-power, dual-supply logic translation in space- and energy-constrained systems - specifically engineered for seamless interoperability between heterogeneous voltage domains in modern embedded architectures.

FAQ

Can 74AXP1T32 operate with VCCI = 0.7 V and VCCO = 5.5 V simultaneously?

Yes. The device is fully specified across its entire dual-supply range: VCCI may be as low as 0.7 V while VCCO is simultaneously at 5.5 V. Propagation delay increases to 16.8 ns (max) under these conditions, and VOH remains ≥3.7 V at IO = −12 mA per datasheet Table 7. All static and dynamic parameters remain valid within these limits.

Does the 74AXP1T32 support hot insertion when VCCI is powered but VCCO is off?

Yes. When VCCO = 0 V and VCCI is active, the IOFF circuit forces output Y into high-impedance state, limiting backflow current to ±0.5 μA (max) per Table 7. This prevents bus contention and protects downstream 5 V circuitry during live insertion - a key feature validated per JEDEC JESD78D Class II latch-up testing.

What is the maximum capacitive load the 74AXP1T32 can drive at 3.3 V VCCO?

At VCCO = 3.3 V, the device drives loads up to 50 pF while maintaining tpd ≤ 7.0 ns (max) and tt ≤ 1.0 ns (max) per Table 11. For loads exceeding 50 pF, propagation delay increases linearly (see Fig. 7); derating is required above 120 pF to stay within timing budgets.

Is the Schmitt-trigger hysteresis fixed or VCCI-dependent?

Hysteresis is VCCI-dependent: typical threshold spread is 100 mV at VCCI = 1.2 V and scales proportionally - e.g., ~130 mV at VCCI = 1.8 V. This ensures consistent noise margin across the full 0.7–2.75 V input supply range, as confirmed by VIH/VIL measurements in Table 7.