Nexperia USA Inc. 74AXP1T34GNH
- Part No.:
- 74AXP1T34GNH
- Manufacturer:
- Nexperia USA Inc.
- Package:
- 6-XFDFN
- Datasheet:
-
74AXP1T34GNH.pdf
- Description:
- IC TRANSLTR UNIDIRECTIONAL 6XSON
- Quantity:
- Payment:

- Shipping:

Inventory:4,944
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
74AXP1T34GNH from Nexperia is a dual-supply translating buffer IC with independent input (VCCI) and output (VCCO) rails, enabling bidirectional voltage level translation between 0.7 V–2.75 V and 1.2 V–5.5 V domains. It features Schmitt-trigger inputs for noise immunity, IOFF circuitry for partial power-down protection, and operates across –40 °C to +85 °C. Used in mixed-voltage I/O interfacing between low-power microcontrollers and higher-voltage peripherals.
For engineers reviewing the 74AXP1T34GNH datasheet, 74AXP1T34GNH pinout, 74AXP1T34GNH application, or 74AXP1T34GNH equivalent, this device supports precise voltage domain bridging in space-constrained portable electronics, battery-powered sensors, and multi-rail FPGA/ASIC I/O expansion where static/dynamic power minimization and rail-to-rail compatibility are critical selection criteria.
Technical Context
The 74AXP1T34GNH implements a single-channel unidirectional buffer with input referenced to VCCI and output referenced to VCCO, supporting true dual-supply operation without internal level-shifting circuitry. Its Schmitt-trigger input ensures robust signal integrity with slow-edge signals, while IOFF disables the output during power-down to prevent backflow current.
It complies with JEDEC standards JESD8-12A.01 through JESD12-6 across multiple voltage bands and delivers ultra-low static current (≤0.5 μA ICCI at 85 °C) and dynamic capacitance (CI = 0.6 pF, CO = 1.8 pF), making it suitable for always-on subsystems and battery-backed interfaces.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCCI Range | 0.7 V to 2.75 V - Enables interface with sub-1V logic (e.g., ARM Cortex-M0+ I/O) and 1.2V/1.8V cores. |
| VCCO Range | 1.2 V to 5.5 V - Supports legacy 3.3V/5V peripherals, GPIO expanders, and industrial I/O modules. |
| Propagation Delay | 1.6 ns to 152 ns - Varies with supply combination; minimum 1.6 ns at VCCI=2.5V/VCCO=5.0V enables high-speed data handshaking. |
| IOFF Leakage | ±0.5 μA max - Ensures safe isolation when either supply is powered down, preventing bus contention or damage. |
| Input Capacitance | 0.6 pF typical - Minimizes loading on driving source, preserving signal rise/fall times in high-frequency traces. |
| ESD Rating | HBM >2000 V, CDM >1000 V - Meets industrial-grade ESD robustness without external protection components. |
Pinout & Package
XSON6 package (SOT1115): extremely thin small outline, no leads, 6 terminals, body size 0.9 × 1.0 × 0.35 mm - optimized for high-density PCB layouts and automated assembly in wearables and IoT edge nodes.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - VCCI | Input supply reference | Powers input stage and sets logic threshold; must be stable before A transitions. |
| 2 - A | Data input | Schmitt-triggered; accepts voltages up to 2.75 V regardless of VCCI setting. |
| 3 - GND | Ground reference | Common return for both supplies; mandatory connection for IOFF functionality and noise rejection. |
| 4 - Y | Data output | CMOS-compatible output referenced to VCCO; drives loads up to ±12 mA at 3.3V. |
| 5 - n.c. | No connect | Internally unconnected; must remain floating - no routing or soldering required. |
| 6 - VCCO | Output supply reference | Sets output voltage swing and drive strength; decoupling capacitor required near pin. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-supply translation | Independent VCCI (0.7–2.75 V) and VCCO (1.2–5.5 V) enable interoperability across three generations of logic families. |
| IOFF partial power-down | Automatically disables Y output when either VCCI or VCCO = 0 V, eliminating backfeed risk in hot-swap or sleep-mode systems. |
| Ultra-low static power | ICCI ≤ 0.5 μA and ICCO ≤ 1.8 μA at 85 °C - extends battery life in always-listening sensor nodes. |
| Schmitt-trigger input | Hysteresis ≥ 100 mV typical - rejects noise on long traces or unshielded cables without external RC filtering. |
| JEDEC-compliant I/O | Validated against JESD8-12A.01 through JESD12-6 - guarantees interoperability with certified 1.2V/1.8V/2.5V/3.3V/5V ASICs and FPGAs. |
Applications
| Mobile Sensor Hub Interface | Industrial PLC I/O Expansion |
|---|---|
|
Use Scenario: Interfacing a 1.2 V MEMS accelerometer to a 3.3 V programmable logic controller via SPI clock/data lines. IC Role / Device Role / Timing Role: Translates rising/falling edges from low-voltage sensor outputs to full-swing 3.3 V logic levels while maintaining timing integrity. Use Value: Eliminates need for discrete MOSFET translators or resistive dividers, reducing BOM count and board area by 60%. |
Use Scenario: Adding isolated digital inputs to a 24 V industrial controller using a 1.8 V FPGA I/O bank. IC Role / Device Role / Timing Role: Buffers and translates 24 V optocoupler outputs (via level-shifted 1.8 V intermediate rail) to FPGA inputs. Use Value: Provides rail-agnostic input tolerance and IOFF protection during FPGA configuration, preventing latch-up during power sequencing. |
| Wearable Biometric Front-End | Automotive Body Control Module |
|
Use Scenario: Connecting a 0.8 V ultra-low-power heart-rate monitor SoC to a 1.8 V Bluetooth transceiver's GPIO control lines. IC Role / Device Role / Timing Role: Unidirectional level translator ensuring sub-1V logic compatibility without compromising signal edge rate. Use Value: Achieves <1.5 ns propagation delay at 0.8 V/1.8 V, preserving real-time response in biometric feedback loops. |
Use Scenario: Bridging LIN bus transceiver status flags (5 V) to a 2.5 V automotive microcontroller's interrupt pins. IC Role / Device Role / Timing Role: Voltage translator with HBM >2000 V ESD rating, meeting ISO 10605 requirements for under-hood environments. Use Value: Replaces discrete Zener-based clamping networks, reducing component count and improving long-term reliability in thermal cycling conditions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-supply buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TXS0102DCUR | 2-channel, auto-direction sensing, higher ICCO (10 μA), larger X2SON8 package (1.35 × 2.0 mm) | Requires no direction control signal but consumes ~20× more static current than 74AXP1T34GNH | Prefer when bidirectional data flow is needed; avoid if ultra-low quiescent current is mandatory. |
| SN74LVC1T34DBVR | Single-supply only (1.65–5.5 V), no VCCI/VCCO separation, lower ESD (HBM 2000 V same, but no CDM spec) | Lacks true dual-rail translation - cannot interface sub-1.65 V logic like 0.8 V IoT MCUs | Select only for single-rail systems; reject for mixed-voltage designs requiring sub-1.2 V input support. |
Compared with TXS0102DCUR and SN74LVC1T34DBVR, the 74AXP1T34GNH uniquely combines sub-1V input compatibility, IOFF-enabled power sequencing safety, and 0.6 pF input capacitance - making it the sole choice for space-constrained, battery-sensitive, multi-rail embedded systems demanding guaranteed rail independence.
Availability
74AXP1T34GNH is available at Aetrix Electronics and suitable for mobile sensor hubs, wearable biometric front-ends, industrial PLC I/O expansion, and automotive body control modules requiring stable component supply and long-term lifecycle assurance.
Supply support for 74AXP1T34GNH includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance, reliable, and energy-efficient logic, analog, and discrete components - spun off from Philips in 2017 and headquartered in Nijmegen, Netherlands.
The 74AXP1T34GNH belongs to Nexperia's AXP ultra-low-power logic family, engineered specifically for battery-operated and thermally constrained applications where rail-to-rail voltage translation and zero-power-state safety are non-negotiable design requirements.
FAQ
Can 74AXP1T34GNH translate from 5.5 V down to 0.7 V?
No. The device only supports unidirectional translation: input referenced to VCCI (0.7–2.75 V) and output referenced to VCCO (1.2–5.5 V). It cannot accept 5.5 V on A or drive 0.7 V on Y. Input voltage must not exceed 2.75 V, and output swing is always tied to VCCO.
Does the n.c. pin on SOT1115 require grounding or termination?
No. Pin 5 is internally unconnected and must remain floating - no PCB trace, solder, or pull-up/down resistor should be applied. Routing to ground or VCC would violate the package specification and may cause functional failure or increased leakage.
What is the maximum capacitive load the Y output can drive reliably?
The Y output is characterized up to 120 pF load capacitance per Figure 7–12. At 3.3 V VCCO and 25 °C, propagation delay increases from 1.7 ns (CL = 0 pF) to 7.1 ns (CL = 120 pF). For timing-critical paths, keep CL ≤ 30 pF to maintain sub-3 ns delay.
How does IOFF behave when only VCCI is powered and VCCO = 0 V?
When VCCO = 0 V (or ≤ 0.1 V) and VCCI is active, IOFF activates automatically: Y enters high-impedance state with ≤±0.5 μA off-state current. This prevents current injection into a powered-down 3.3 V or 5 V rail, satisfying IEC 61000-4-2 system-level ESD safety requirements.
74AXP1T34GNH Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AXP
- Package/Case:
- 6-XFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 1
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- Push-Pull
- Current - Output High, Low:
- 12mA, 12mA
- Voltage - Supply:
- 0.7V ~ 2.75V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-XSON (0.9x1)
74AXP1T34GNH FAQ
1.How can I place an order for 74AXP1T34GNH through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AXP1T34GNH on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AXP1T34GNH reliable?
The price and inventory of 74AXP1T34GNH are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AXP1T34GNH is usually 5 days.
3.What payment methods are accepted for 74AXP1T34GNH?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AXP1T34GNH transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AXP1T34GNH?
74AXP1T34GNH orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AXP1T34GNH order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AXP1T34GNH?
For technical support, including 74AXP1T34GNH datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AXP1T34GNH requirements.
6.How does Aetrix verify that 74AXP1T34GNH is sourced from the original manufacturer or authorized distributors?
All 74AXP1T34GNH products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AXP1T34GNH meets industry standards.
7.What is the process for return or replacement of 74AXP1T34GNH?
All 74AXP1T34GNH units undergo pre-shipment inspection (PSI). If there is an issue with 74AXP1T34GNH, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AXP1T34GNH part is unused and in its original packaging.
Return procedure for 74AXP1T34GNH:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74AXP1T34GNH Tags
-
SN74LVC1G17DBVR
Texas Instruments
-
SN74LVC1G07DCKR
Texas Instruments
-
SN74LVC1G17DCKR
Texas Instruments
-
SN74LVC1G07DBVR
Texas Instruments
-
SN74LVC1G125DCKR
Texas Instruments
-
SN74AHCT1G126DBVR
Texas Instruments
-
SN74LVC1G125DBVR
Texas Instruments
-
SN74AHCT1G125DBVR
Texas Instruments

-
SN74LVC2G17DBVR
Texas Instruments

-
SN74LVC2G07DCKR
Texas Instruments
-
SN74LVC1G34DCKR
Texas Instruments

-
SN74LVC2G17DCKR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

