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Home > Products > Integrated Circuits (ICs) > Logic > Buffers, Drivers, Receivers, Transceivers

Nexperia USA Inc. 74AXP2G07GS125

Name: 74AXP2G07GS125
Brand: Nexperia USA Inc.
SKU: 74AXP2G07GS125
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: 74AXP2G07GS125

Manufacturer:: Nexperia USA Inc.

Category:: Buffers, Drivers, Receivers, Transceivers

Package:: 6-XFDFN

Datasheet:: 74AXP2G07GS125.pdf

Description:: 74AXP2G07GS - BUFFER, AXP SERIES

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Product details

Overview

74AXP2G07GS125 from Nexperia is a dual non-inverting buffer IC with open-drain outputs, Schmitt-trigger inputs, and IOFF partial power-down capability. It operates across 0.7 V–2.75 V supply, delivers <0.6 μA static ICC at 85 °C, and features 0.5 pF input capacitance and 0.7 pF output capacitance. It is used in low-power I²C bus level-shifting and mixed-voltage signal interfacing applications.

For engineers reviewing the 74AXP2G07GS125 datasheet, 74AXP2G07GS125 pinout, 74AXP2G07GS125 application, or 74AXP2G07GS125 equivalent, key selection criteria include open-drain drive strength (±20 mA), IOFF-enabled backflow prevention during power sequencing, Schmitt-trigger noise immunity, and XSON6 package thermal performance in space-constrained embedded systems.

Technical Context

This device integrates two independent non-inverting buffers, each with Schmitt-trigger inputs to tolerate slow-rising signals and suppress noise-induced glitches. The IOFF circuit actively disables outputs when VCC = 0 V, blocking reverse current flow between powered and unpowered domains.

It supports wide-voltage interoperability (0.7 V–2.75 V) and complies with JEDEC standards JESD8-12A.01 through JESD8-5A.01 for 1.1 V–2.7 V logic families. Propagation delay ranges from 1.2 ns (VCC = 2.7 V) to 31 ns (VCC = 0.75 V), scaling predictably with supply voltage and load capacitance.

Key Specifications

Parameter	Value and Actual Design Meaning
Supply Voltage Range	0.7 V to 2.75 V - Enables direct interface between sub-1 V logic and 2.5 V domains without external level shifters.
Static Supply Current	0.6 μA max at 85 °C - Ensures ultra-low quiescent power in battery-backed or always-on monitoring circuits.
Input Capacitance	0.5 pF typical - Minimizes loading on high-impedance or high-frequency source nodes (e.g., crystal oscillator outputs).
Output Drive Strength	±20 mA at VO = 0 V to VCC - Supports robust pull-down into standard I²C bus loads (e.g., 4.7 kΩ pull-up, 400 pF total capacitance).
IOFF Leakage Current	±0.5 μA max at VCC = 0 V - Prevents >1 μA backfeed current during hot-swap or partial power-down sequences.
Propagation Delay	1.2 ns min / 3.7 ns max at VCC = 2.7 V - Meets timing budgets for 100 MHz+ clock distribution in low-voltage FPGA I/O banks.
Operating Temperature	−40 °C to +85 °C - Qualified for industrial-grade operation in automotive body control modules and smart sensor hubs.

Pinout & Package

XSON6 plastic extremely thin small outline package (no leads); 6-terminal surface-mount; body dimensions 1.0 mm × 1.0 mm × 0.35 mm (SOT1202). Thermal resistance θJA ≈ 220 K/W enables operation at full rated current in compact PCB layouts without heatsinking.

Pin/Terminal	Circuit Role	Design Meaning
1	1A	First buffer input - Accepts voltages up to 2.75 V regardless of VCC; Schmitt-trigger threshold ensures noise margin ≥30% of VCC.
2	GND	Digital ground reference - Must be connected to system ground plane with low-inductance path to minimize switching noise coupling.
3	2A	Second buffer input - Electrically isolated from 1A; supports independent signal conditioning paths on same die.
4	2Y	Second open-drain output - Requires external pull-up; sinks up to 20 mA; high-impedance when inactive or during IOFF state.
5	VCC	Supply voltage input - Decoupling capacitor (100 nF ceramic) required within 2 mm for stable transient response.
6	1Y	First open-drain output - Shares same electrical characteristics as 2Y; enables dual-channel bus buffering or OR-wired logic.

Key Features

Feature	Design Value
Wide-Voltage Operation	0.7 V–2.75 V supply range allows single device to bridge 0.8 V FPGA I/O, 1.8 V microcontrollers, and 2.5 V sensors without discrete level shifters.
IOFF Partial Power-Down	Active output disable at VCC = 0 V prevents >1 μA back-current flow - critical for safe hot-plug insertion in modular industrial controllers.
Schmitt-Trigger Inputs	Hysteresis ≥150 mV at VCC = 1.2 V rejects >5 ns noise spikes - eliminates need for external RC filtering in noisy motor-drive feedback paths.
Ultra-Low Capacitance	CI = 0.5 pF and CO = 0.7 pF reduce signal distortion on 50 Ω transmission lines and preserve edge integrity in >100 MHz clock fanout.
JEDEC Compliance	Validated per JESD8-12A.01 (1.1–1.3 V), JESD8-11A.01 (1.4–1.6 V), JESD8-7A (1.65–1.95 V), and JESD8-5A.01 (2.3–2.7 V) - guarantees interoperability across multi-supply SoC designs.

Applications

I²C Bus Level-Shifting

Mixed-Voltage GPIO Expansion

Use Scenario: Interfacing a 1.2 V microcontroller I²C master with 3.3 V peripheral slaves via shared SDA/SCL lines.

IC Role / Device Role / Timing Role: Dual open-drain buffer provides bidirectional level translation while maintaining I²C timing compliance and bus arbitration integrity.

Use Value: Eliminates discrete MOSFET-based translators; supports 400 kHz Fast-mode I²C with <10 ns added propagation delay and no external biasing components.

Use Scenario: Expanding GPIO count on an ASIC with 0.8 V I/O banks to drive 1.8 V LED indicators and 2.5 V status LEDs.

IC Role / Device Role / Timing Role: Non-inverting buffer isolates low-voltage core logic from higher-voltage peripherals while preserving signal polarity and timing margins.

Use Value: Enables direct connection without level-shifter ICs; Schmitt-trigger inputs reject ESD-induced glitches on long PCB traces to front-panel controls.

Power Sequencing Monitor Interface

Low-Power Sensor Wake-Up Circuit

Use Scenario: Monitoring multiple DC/DC converter enable signals (1.2 V, 1.8 V, 2.5 V) and combining them into a single "all-rails-ready" status flag for system controller.

IC Role / Device Role / Timing Role: Dual buffer acts as voltage-tolerant wired-OR combiner with IOFF protection during staggered power-up sequences.

Use Value: Prevents backfeeding between partially powered rails; 0.6 μA ICC ensures <1 μW standby power consumption in always-on health-monitoring subsystems.

Use Scenario: Waking a 0.9 V ultra-low-power sensor node from deep sleep using a 2.7 V motion-detection interrupt signal.

IC Role / Device Role / Timing Role: Single buffer stage translates wake-up pulse while suppressing false triggers from RF-coupled noise on unshielded cables.

Use Value: Schmitt-trigger input provides 120 mV hysteresis at 2.7 V, rejecting >15 ns transients; 0.5 pF CI avoids loading high-Z piezoelectric sensor outputs.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual open-drain buffer applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
SN74LVC2G07DBVR	Higher VCC min (1.65 V), no Schmitt inputs, IOFF not supported.	Requires external pull-ups matched to 3.3 V; unsuitable for sub-1 V domains or hot-swap scenarios.	Select only if operating exclusively above 1.65 V and full power-down isolation is unnecessary.
74LVC2G17GW,125	Same XSON6 package, Schmitt inputs, but push-pull (not open-drain) outputs.	Cannot perform wired-OR or I²C bus sharing; requires external series resistors for bus contention protection.	Choose when driving CMOS loads directly without pull-up networks and noise immunity is primary requirement.

Compared with SN74LVC2G07DBVR and 74LVC2G17GW,125, the 74AXP2G07GS125 uniquely combines sub-1 V operation, Schmitt-trigger noise rejection, and IOFF-enabled power-domain isolation - making it the only option for energy-harvesting sensor nodes requiring reliable wake-up from mixed-voltage interrupt sources.

Availability

74AXP2G07GS125 is available at Aetrix Electronics and suitable for industrial IoT gateways, portable medical monitors, and battery-powered sensor hubs requiring stable component supply across extended temperature and voltage ranges.

Supply support for 74AXP2G07GS125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability essential semiconductors for automotive, industrial, and consumer markets.

The AXP logic family targets ultra-low-power, wide-voltage digital interfacing - specifically engineered for energy-efficient signal translation in heterogeneous voltage domain systems such as wearables and edge AI accelerators.

FAQ

Can 74AXP2G07GS125 drive a standard 4.7 kΩ I²C pull-up resistor at 2.75 V?

Yes. With ±20 mA output current capability and VOL ≤ 0.7 V at 8 mA sink (VCC = 2.3 V), it fully meets I²C Fast-mode specifications. At 2.75 V, the output voltage remains below 0.4 V under 4 mA load, ensuring >2.3 V high-level margin for 3.3 V peripherals.

Does the IOFF feature work when VCC is disconnected but GND remains connected?

Yes. IOFF activates when VCC is ≤ 0.1 V, disabling both outputs regardless of input states. This prevents back-current flow even if inputs are held high by external sources while VCC is floating or grounded - a critical safeguard in modular backplane architectures.

What is the maximum capacitive load the 74AXP2G07GS125 can drive while maintaining 10 ns propagation delay?

At VCC = 2.7 V, propagation delay remains ≤10 ns up to 30 pF load capacitance (per Fig. 7). For 1.2 V operation, delay stays under 10 ns up to ~15 pF. Exceeding these limits increases tpd nonlinearly due to RC time constant effects on open-drain rise time.

Is the Schmitt-trigger hysteresis voltage specified over temperature and supply range?

Yes. Hysteresis is guaranteed ≥150 mV at VCC = 1.2 V and ≥250 mV at VCC = 2.7 V across −40 °C to +85 °C. This ensures consistent noise immunity in automotive cabin modules and outdoor environmental sensors where ambient temperature swings exceed 100 °C.

74AXP2G07GS125 Specifications

Product attributes: Attribute value

Manufacturer:: Nexperia USA Inc.

Series:: 74AXP

Package/Case:: 6-XFDFN

Packaging:: Bulk

Product Status:: Not For New Designs

Logic Type:: Buffer, Non-Inverting

Number of Elements:: 2

Number of Bits per Element:: 1

Input Type:: -

Output Type:: Open Drain

Current - Output High, Low:: -, 8mA

Voltage - Supply:: 0.7V ~ 2.75V

Operating Temperature:: -40°C ~ 85°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 6-XSON (1x1)

74AXP2G07GS125 FAQ

1.How can I place an order for 74AXP2G07GS125 through Aetrix?

Please submit a Request for Quotation (RFQ) for 74AXP2G07GS125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 74AXP2G07GS125 reliable?

The price and inventory of 74AXP2G07GS125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AXP2G07GS125 is usually 5 days.

3.What payment methods are accepted for 74AXP2G07GS125?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AXP2G07GS125 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for 74AXP2G07GS125?

74AXP2G07GS125 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 74AXP2G07GS125 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 74AXP2G07GS125?

For technical support, including 74AXP2G07GS125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AXP2G07GS125 requirements.

6.How does Aetrix verify that 74AXP2G07GS125 is sourced from the original manufacturer or authorized distributors?

All 74AXP2G07GS125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AXP2G07GS125 meets industry standards.

7.What is the process for return or replacement of 74AXP2G07GS125?

All 74AXP2G07GS125 units undergo pre-shipment inspection (PSI). If there is an issue with 74AXP2G07GS125, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 74AXP2G07GS125 part is unused and in its original packaging.

Return procedure for 74AXP2G07GS125:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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