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Nexperia USA Inc. 74AXP2G3404GNH

Part No.:
74AXP2G3404GNH
Manufacturer:
Nexperia USA Inc.
Category:
Gates and Inverters - Multi-Function, Configurable
Package:
6-XFDFN
Datasheet:
Aetrix74AXP2G3404GNH.pdf
Description:
IC BUFFER INVERTER SGL X2SON6Q
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:3,214

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Product details

Overview

74AXP2G3404 from Nexperia is a dual-function low-power logic IC containing one Schmitt-trigger buffer (1A→1Y) and one Schmitt-trigger inverter (2A→2Y), operating across 0.7 V–2.75 V supply. It delivers ultra-low static current (0.6 µA max at 85 °C), IOFF-enabled partial power-down protection, and sub-1 ns transition times at 2.7 V. Used in battery-powered sensor interfaces and voltage-level translation between mixed-supply subsystems.

For engineers reviewing the 74AXP2G3404 datasheet, 74AXP2G3404 pinout, 74AXP2G3404 application, or 74AXP2G3404 equivalent, key selection criteria include its dual Schmitt-trigger inputs for noise immunity, IOFF leakage control under power-down, wide-VCC compatibility down to 0.7 V, and XSON6 footprint constraints for space-constrained portable designs.

Technical Context

This device implements two independent CMOS logic gates with Schmitt-trigger inputs on a single die, enabling robust signal conditioning of slow-rising or noisy digital signals without external hysteresis components. Each gate features rail-to-rail input tolerance up to 2.75 V regardless of VCC level.

The IOFF circuit actively disables both outputs when VCC = 0 V, limiting backflow current to ≤0.5 µA (max) and meeting JEDEC JESD78 Class II latch-up immunity (>100 mA). Propagation delay ranges from 0.9 ns (VCC = 2.3–2.7 V) to 110 ns (VCC = 0.75–0.85 V), scaling predictably with supply voltage and load.

Key Specifications

ParameterValue and Actual Design Meaning
VCC Range0.7 V to 2.75 V - supports direct interface with sub-1 V logic families and legacy 2.5 V systems
ICC (max)0.6 µA at 85 °C - enables multi-year operation in coin-cell–powered IoT endpoints
IOFF Leakage±0.5 µA max at VCC = 0 V - prevents bus contention during hot-swap or partial system shutdown
tpd (min)0.9 ns at VCC = 2.3–2.7 V - sufficient for 500+ MHz clock distribution in low-noise domains
CI / CO0.5 pF / 1.0 pF - minimizes capacitive loading on high-impedance source nodes and PCB traces
Input HysteresisTypical 150 mV - rejects EMI-induced glitches on long flex-cable or antenna-proximate lines
ESD RatingHBM >2 kV, CDM >1000 V - survives handling and board-level assembly without additional protection

Pinout & Package

XSON6 package (SOT1115): 0.9 mm × 1.0 mm × 0.35 mm body, no leads, wettable flank terminals, pin 1 indicator in lower-left corner below marking code "rZ".

Pin/TerminalCircuit RoleDesign Meaning
1ABuffer inputAccepts 0–2.75 V; Schmitt-trigger threshold adjusts with VCC (e.g., 0.65×VCC at 1.1–1.95 V)
GNDGround reference0 V return path for all internal logic and output drivers; must be low-inductance
2AInverter inputIndependent Schmitt-trigger input with identical voltage thresholds and hysteresis as 1A
2YInverter outputCMOS push-pull output; sinks/sourcing ±8 mA at VCC = 2.3 V; IOFF active when VCC = 0 V
VCCSupply railSingle power pin for both gates; IOFF monitoring occurs directly on this node
1YBuffer outputCMOS push-pull output; electrically isolated from 2Y; shares same VCC/GND but independent logic paths

Key Features

FeatureDesign Value
Dual Schmitt-trigger inputsEnables reliable edge detection on slow or noisy signals (e.g., mechanical switch bounce, thermistor ADC outputs)
IOFF partial power-downPrevents destructive back-current flow when VCC is removed while I/O pins remain biased (e.g., hot-plug modules)
0.7 V minimum VCCDirect compatibility with emerging ultra-low-voltage microcontrollers (e.g., ARM Cortex-M0+ at 0.8 V core)
Sub-1 pF input capacitancePreserves signal integrity on high-frequency sensor lines (e.g., MEMS microphone clock, RF detector outputs)
JESD8 complianceValidated interoperability across 1.1–2.7 V logic families (JESD8-12A.01 through JESD8-5A.01)

Applications

Industrial Sensor InterfaceWearable Biometric Front-End

Use Scenario: Conditioning analog switch outputs and thermistor-derived digital alerts in factory-floor temperature monitors.

IC Role / Device Role / Timing Role: Buffer cleans slow-rising mechanical contact closure; inverter provides active-low alarm polarity matching to host MCU GPIO.

Use Value: Schmitt-trigger hysteresis eliminates false triggers from EMI on 2-meter unshielded wiring; IOFF prevents current leakage into powered-down sensor bus.

Use Scenario: Level-shifting and debouncing PPG sensor interrupt signals before routing to an ultra-low-power SoC running at 0.9 V.

IC Role / Device Role / Timing Role: Inverter converts open-drain photodiode interrupt to push-pull; buffer drives low-capacitance trace to ADC trigger input.

Use Value: 0.7 V operational capability matches SoC's lowest retention voltage; 0.5 pF CI avoids loading sensitive photodiode bias node.

USB-C Port Power NegotiationSmart Home Zigbee Node

Use Scenario: Interfacing CC line status (5 V tolerant) to 1.8 V USB PD controller during plug insertion detection.

IC Role / Device Role / Timing Role: Buffer isolates 5 V CC line from 1.8 V controller; inverter generates complementary ready signal for state machine.

Use Value: Input tolerance to 2.75 V allows direct connection without resistive divider; <10% VCC overshoot ensures clean transitions into PD controller's Schmitt-triggered inputs.

Use Scenario: Debouncing tamper-detection switch and buffering Zigbee module reset request in battery-operated door sensor.

IC Role / Device Role / Timing Role: Inverter provides inverted tamper signal to MCU; buffer drives reset line with fast edge rate for reliable module initialization.

Use Value: 0.6 µA ICC extends 2-year battery life; IOFF blocks current path when Zigbee SoC powers down while switch remains closed.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-buffer/inverter applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
74LVC2G3404DPHigher VCC min (1.65 V); no IOFF; 3.5 pF CPD vs. 2.4 pFNot suitable for partial power-down systems; requires ≥1.65 V supplySelect only if operating exclusively above 1.65 V and IOFF is unnecessary
SN74LVC1G3404DSFRSingle-gate version (buffer only); no inverter function; SOT-23-5 packageRequires two devices to replicate dual functionality; larger footprint than XSON6Choose only when design mandates separate buffer/inverter placement or legacy SOT-23 layout reuse

Compared with 74LVC2G3404DP and SN74LVC1G3404DSFR, the 74AXP2G3404 uniquely combines dual Schmitt-trigger logic, sub-1 V operation, and IOFF in a 0.9×1.0 mm XSON6 package-enabling single-chip solutions in space- and power-constrained mixed-voltage systems where partial power-down sequencing is required.

Availability

74AXP2G3404 is available at Aetrix Electronics and suitable for industrial sensor interfaces, wearable biometric front-ends, USB-C port negotiation circuits, and smart home Zigbee nodes requiring stable component supply across extended temperature and ultra-low-voltage conditions.

Supply support for 74AXP2G3404 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance logic, discrete, and MOSFET solutions optimized for reliability and energy efficiency.

The 74AXP series targets ultra-low-power portable and battery-operated applications, emphasizing sub-1 V operation, minimal static/dynamic power, and robustness in mixed-supply environments.

FAQ

What is the maximum input voltage the 74AXP2G3404 can tolerate when VCC = 0 V?

The device accepts input voltages up to 2.75 V on any pin-including 1A, 2A, 1Y, and 2Y-even when VCC = 0 V. This is enabled by its IOFF circuitry, which isolates the internal core and prevents damaging back-current flow, making it safe for hot-insertion scenarios where I/O pins may be driven before power is applied.

Does the 74AXP2G3404 support true bidirectional signal conditioning?

No. The 74AXP2G3404 is strictly unidirectional: 1A drives 1Y (buffer), and 2A drives 2Y (inverter). Neither output can drive its corresponding input, and there is no internal feedback path or bus-hold feature. Its role is signal shaping and polarity inversion-not data direction control or bus arbitration.

How does the Schmitt-trigger hysteresis vary with supply voltage?

Hysteresis is proportional to VCC: at VCC = 1.1–1.95 V, VIH = 0.65×VCC and VIL = 0.35×VCC, yielding ~0.3×VCC hysteresis (e.g., ~330 mV at 1.1 V, ~590 mV at 1.95 V). At VCC = 2.3–2.7 V, fixed VIH = 1.6 V and VIL = 0.7 V produce ~900 mV hysteresis, ensuring consistent noise margin across the full operating range.

Can the 74AXP2G3404 drive a 50 Ω transmission line directly?

No. With typical output drive strength of ±8 mA at VCC = 2.3 V, the 74AXP2G3404 cannot sustain 50 Ω termination (requiring ±50 mA for 2.5 V swing). It is intended for point-to-point routing to high-impedance CMOS inputs (≥10 kΩ) or short PCB traces (<5 cm). For 50 Ω line driving, a dedicated line driver or buffer with higher current capability is required.

74AXP2G3404GNH Specifications

Product attributes
Attribute value
Manufacturer:
Nexperia USA Inc.
Series:
74AXP
Package/Case:
6-XFDFN
Packaging:
Tape & Reel (TR)
Product Status:
Obsolete
Logic Type:
Buffer/Inverter
Number of Circuits:
2
Number of Inputs:
2 Input (1, 1)
Schmitt Trigger Input:
No
Output Type:
Single-Ended
Current - Output High, Low:
8mA, 8mA
Voltage - Supply:
0.7V ~ 2.75V
Operating Temperature:
-40°C ~ 85°C
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
6-XSON (0.9x1)

74AXP2G3404GNH FAQ

1.How can I place an order for 74AXP2G3404GNH through Aetrix?

Please submit a Request for Quotation (RFQ) for 74AXP2G3404GNH on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 74AXP2G3404GNH reliable?

The price and inventory of 74AXP2G3404GNH are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AXP2G3404GNH is usually 5 days.

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Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 74AXP2G3404GNH?

For technical support, including 74AXP2G3404GNH datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AXP2G3404GNH requirements.

6.How does Aetrix verify that 74AXP2G3404GNH is sourced from the original manufacturer or authorized distributors?

All 74AXP2G3404GNH products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AXP2G3404GNH meets industry standards.

7.What is the process for return or replacement of 74AXP2G3404GNH?

All 74AXP2G3404GNH units undergo pre-shipment inspection (PSI). If there is an issue with 74AXP2G3404GNH, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 74AXP2G3404GNH part is unused and in its original packaging.

Return procedure for 74AXP2G3404GNH:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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