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Home > Products > Integrated Circuits (ICs) > Logic > Signal Switches, Multiplexers, Decoders

Texas Instruments 74CBTLV1G125CRE4

Name: 74CBTLV1G125CRE4
Brand: Texas Instruments
SKU: 74CBTLV1G125CRE4
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: 74CBTLV1G125CRE4

Manufacturer:: Texas Instruments

Category:: Signal Switches, Multiplexers, Decoders

Package:: 5-TSSOP, SC-70-5, SOT-353

Datasheet:: 74CBTLV1G125CRE4.pdf

Description:: IC BUS SWITCH 1 X 1:1 SC70-5

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Product details

Overview

74CBTLV1G125CRE4 from Texas Instruments is a low-voltage single FET bus switch with 5-Ω on-state resistance, rail-to-rail switching capability, and I_off support for partial-power-down mode. It operates from 2.3 V to 3.6 V, features 0.15 ns propagation delay at 3.3 V, and is used in high-speed data path isolation for portable computing and interface bridging.

For engineers reviewing the 74CBTLV1G125CRE4 datasheet, 74CBTLV1G125CRE4 pinout, 74CBTLV1G125CRE4 application, or 74CBTLV1G125CRE4 equivalent, key selection criteria include on-resistance stability across voltage range, I_off leakage under power-down, OE-controlled high-impedance state timing, and SC-70 package thermal performance in space-constrained PCB layouts.

Technical Context

This device implements a single-channel NMOS transmission gate switch with no internal level-shifting or buffering. Its control logic is purely OE-driven: low OE enables bidirectional conduction between A and B ports; high OE forces both ports into high-impedance isolation.

The switch uses FET-based topology with rail-to-rail signal handling-supporting input/output voltages from GND to V_CC-and incorporates I_off circuitry that limits backflow current to ≤10 µA when V_CC = 0 V and port voltages range from 0 to 3.6 V.

Key Specifications

Parameter	Value and Actual Design Meaning
On-state resistance (r_on)	5 Ω typical at V_CC = 3 V, enabling minimal signal attenuation in high-speed digital paths
Supply voltage range	2.3 V to 3.6 V - compatible with 2.5 V and 3.3 V logic domains without level translation
I_off leakage	10 µA max at V_CC = 0 V - ensures safe isolation during partial power-down of subsystems
Propagation delay (t_pd)	0.15 ns typical at V_CC = 3.3 V - supports >3 GHz signal bandwidth in point-to-point links
Enable/disable time (t_en/t_dis)	1–4 ns - guarantees fast, deterministic bus arbitration and hot-swap readiness
Input capacitance (C_i)	2.5 pF - minimizes loading on driving logic and preserves signal edge integrity
Off-state I/O capacitance (C_io(OFF))	7 pF - reduces crosstalk and maintains channel isolation at high frequencies

Pinout & Package

74CBTLV1G125CRE4 is packaged in a 5-pin SC-70 (DCK) surface-mount package measuring 2.0 mm × 1.25 mm × 0.9 mm, optimized for high-density routing and thermal dissipation in portable electronics.

Pin/Terminal	Circuit Role	Design Meaning
1	OE (Output Enable)	Active-low control input; drives switch to high-Z when high; must be pulled up to V_CC during power sequencing
2	A	Input/output port A - bidirectional, rail-to-rail capable, connects to upstream logic or controller
3	V_CC	Positive supply - powers internal FET gate drive and defines logic threshold for OE
4	B	Input/output port B - bidirectional, rail-to-rail capable, connects to downstream bus or peripheral
5	GND	Ground reference - return path for switch current and control logic; requires low-inductance connection

Key Features

Feature	Design Value
5-Ω low on-resistance	Preserves signal integrity in 50-Ω and 75-Ω trace environments; avoids reflection-induced jitter in DDR/USB paths
I_off partial-power-down protection	Prevents back-current flow when V_CC is off but A/B ports remain biased - critical for hot-plug and multi-rail SoC designs
Rail-to-rail I/O voltage range	Supports full-swing signals from GND to V_CC without clamping or distortion - essential for mixed-voltage interconnects
Sub-nanosecond propagation delay	Enables use in >1 Gbps serial links and high-frequency clock/data gating without timing skew penalties
SC-70 footprint compatibility	Matches industry-standard 5-pin SC-70 layout - allows drop-in replacement with SN74CBTLV1G125DCKR and other TI SC-70 bus switches

Applications

Mobile USB Interface Isolation	Laptop PCIe Lane Multiplexing
Use Scenario: Isolating USB 2.0 D+/D− lines between AP and USB PHY during suspend/resume cycles in ultra-thin notebooks. IC Role / Device Role / Timing Role: Bidirectional analog switch controlled by PMIC's suspend signal to break DC continuity while preserving signal path integrity. Use Value: Eliminates leakage-induced battery drain and prevents false wake events via guaranteed <10 µA I_off and sub-4 ns disable timing.	Use Scenario: Dynamically routing PCIe Gen2 x1 lanes between eMMC controller and Wi-Fi module in shared-lane laptop platforms. IC Role / Device Role / Timing Role: High-speed data path switch enabling lane reassignment without signal degradation or protocol reset. Use Value: 5 Ω r_on and 7 pF C_io(OFF) maintain eye diagram compliance at 5 GT/s; OE-controlled enable/disable avoids link training disruption.
Industrial Sensor Hub Signal Gating	Wearable BLE Coexistence Management
Use Scenario: Enabling/disabling analog sensor outputs (e.g., temperature, IMU) to ADC inputs based on firmware polling schedule in battery-powered edge nodes. IC Role / Device Role / Timing Role: Low-leakage analog switch isolating sensor front-end from ADC during idle periods to reduce system quiescent current. Use Value: Achieves <1 µA total system sleep current by combining 10 µA I_off with rail-to-rail operation - no external biasing required.	Use Scenario: Managing RF interference between BLE radio and NFC reader in compact wearables where antennas share proximity. IC Role / Device Role / Timing Role: Fast-switching isolation gate inserted in NFC data line to suppress BLE transmit noise coupling during active communication. Use Value: 0.15 ns t_pd and 1 ns t_dis ensure NFC frame timing remains unaffected while providing >30 dB RF isolation at 2.4 GHz.

Mobile USB Interface Isolation

Laptop PCIe Lane Multiplexing

Use Scenario: Isolating USB 2.0 D+/D− lines between AP and USB PHY during suspend/resume cycles in ultra-thin notebooks.

IC Role / Device Role / Timing Role: Bidirectional analog switch controlled by PMIC's suspend signal to break DC continuity while preserving signal path integrity.

Use Value: Eliminates leakage-induced battery drain and prevents false wake events via guaranteed <10 µA I_off and sub-4 ns disable timing.

Use Scenario: Dynamically routing PCIe Gen2 x1 lanes between eMMC controller and Wi-Fi module in shared-lane laptop platforms.

IC Role / Device Role / Timing Role: High-speed data path switch enabling lane reassignment without signal degradation or protocol reset.

Use Value: 5 Ω r_on and 7 pF C_io(OFF) maintain eye diagram compliance at 5 GT/s; OE-controlled enable/disable avoids link training disruption.

Industrial Sensor Hub Signal Gating

Wearable BLE Coexistence Management

Use Scenario: Enabling/disabling analog sensor outputs (e.g., temperature, IMU) to ADC inputs based on firmware polling schedule in battery-powered edge nodes.

IC Role / Device Role / Timing Role: Low-leakage analog switch isolating sensor front-end from ADC during idle periods to reduce system quiescent current.

Use Value: Achieves <1 µA total system sleep current by combining 10 µA I_off with rail-to-rail operation - no external biasing required.

Use Scenario: Managing RF interference between BLE radio and NFC reader in compact wearables where antennas share proximity.

IC Role / Device Role / Timing Role: Fast-switching isolation gate inserted in NFC data line to suppress BLE transmit noise coupling during active communication.

Use Value: 0.15 ns t_pd and 1 ns t_dis ensure NFC frame timing remains unaffected while providing >30 dB RF isolation at 2.4 GHz.

Equivalent & Alternatives

The following parts are listed as comparable options for similar bus switch applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
SN74CBTLV1G125DCKR	Identical electrical specs and SC-70 (DCK) package; top-side marking "VM_" vs "74CBTLV1G125CR"; RoHS-compliant with same Cu/NiPdAu finish	No functional difference; identical pinout, timing, and thermal behavior; differs only in TI internal orderable ID and reel packaging	Select when sourcing from standard TI distribution channels with preference for non-E4 suffix; fully interchangeable in design and layout
74LVC1G3157GW,125	Higher r_on (10 Ω typ), wider V_CC range (1.65–5.5 V), slower t_pd (2.5 ns), different pinout (OE on Pin 5, GND on Pin 1)	Acceptable for lower-speed GPIO multiplexing but unsuitable for >500 Mbps signaling due to higher resistance and capacitance	Choose only if 1.65 V operation or 5 V tolerance is required; requires PCB redesign due to inverted pin assignment and larger package footprint

Compared with SN74CBTLV1G125DCKR, 74CBTLV1G125CRE4 offers identical performance and mechanical fit; compared with 74LVC1G3157GW,125, it delivers superior speed, lower on-resistance, and guaranteed SC-70 pin compatibility-making it the preferred choice for high-bandwidth, space-constrained applications.

Availability

74CBTLV1G125CRE4 is available at Aetrix Electronics and suitable for mobile computing, industrial sensor hubs, and wearable RF coexistence management requiring stable component supply, consistent SC-70 packaging, and guaranteed I_off-enabled power sequencing.

Supply support for 74CBTLV1G125CRE4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company delivering analog, embedded processing, and logic solutions for industrial, automotive, and consumer applications with over 50 years of process and design expertise.

The 74CBTLV1G125CRE4 belongs to TI's CBTLV (ColdFire Bus Transceiver Low-Voltage) logic family, engineered specifically for high-speed, low-power signal routing in portable and battery-operated systems where rail-to-rail switching and partial-power-down safety are mandatory.

FAQ

What is the maximum operating temperature range for the 74CBTLV1G125CRE4?

The 74CBTLV1G125CRE4 is rated for continuous operation from –40°C to +85°C ambient temperature. This range is validated per JEDEC JESD78 and applies across the full 2.3 V to 3.6 V supply range. Thermal derating is not required within this envelope, and the SC-70 package's 252°C/W θ_JA ensures safe junction temperatures under typical load conditions.

Does the 74CBTLV1G125CRE4 support true bidirectional signal flow?

Yes, the 74CBTLV1G125CRE4 supports fully bidirectional analog/digital signal flow between its A and B ports when OE is low. Its FET-based architecture imposes no directionality-signals pass equally well from A→B or B→A with identical 5 Ω r_on, 7 pF C_io(OFF), and sub-nanosecond timing characteristics in both directions.

Can the 74CBTLV1G125CRE4 be used with 1.8 V logic systems?

No-the 74CBTLV1G125CRE4 has a minimum recommended V_CC of 2.3 V and is not characterized for reliable operation below that voltage. Attempting to run it at 1.8 V may result in undefined OE threshold behavior, increased r_on, and failure to meet t_pd or I_off specifications. For 1.8 V systems, consider TI's SN74AUC1G125 or similar AUC-family devices.

Is a pull-up resistor required on the OE pin of the 74CBTLV1G125CRE4?

Yes-a pull-up resistor to V_CC is strongly recommended on the OE pin to ensure a defined high state during power-up and power-down sequences. TI specifies the minimum value based on the driver's sink capability; for most microcontroller GPIOs, a 10 kΩ resistor provides sufficient noise immunity while limiting current to <1 µA during normal operation.

How does the I_off feature of the 74CBTLV1G125CRE4 protect system-level circuits?

The I_off feature limits current flow to ≤10 µA when V_CC = 0 V and either A or B port is biased between 0 V and 3.6 V. This prevents damaging back-current from powered subsystems into unpowered rails-critical in multi-voltage SoCs, hot-swap peripherals, and battery-backed modules where isolated power domains must remain electrically decoupled during sleep states. The 74CBTLV1G125CRE4 achieves this without external components or special sequencing.

74CBTLV1G125CRE4 Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: 74CBTLV

Package/Case:: 5-TSSOP, SC-70-5, SOT-353

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Type:: Bus Switch

Circuit:: 1 x 1:1

Independent Circuits:: 1

Current - Output High, Low:: -

Voltage Supply Source:: Single Supply

Voltage - Supply:: 2.3V ~ 3.6V

Operating Temperature:: -40°C ~ 85°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: SC-70-5

74CBTLV1G125CRE4 FAQ

1.How can I place an order for 74CBTLV1G125CRE4 through Aetrix?

Please submit a Request for Quotation (RFQ) for 74CBTLV1G125CRE4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 74CBTLV1G125CRE4 reliable?

The price and inventory of 74CBTLV1G125CRE4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74CBTLV1G125CRE4 is usually 5 days.

3.What payment methods are accepted for 74CBTLV1G125CRE4?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74CBTLV1G125CRE4 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for 74CBTLV1G125CRE4?

74CBTLV1G125CRE4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 74CBTLV1G125CRE4 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 74CBTLV1G125CRE4?

For technical support, including 74CBTLV1G125CRE4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74CBTLV1G125CRE4 requirements.

6.How does Aetrix verify that 74CBTLV1G125CRE4 is sourced from the original manufacturer or authorized distributors?

All 74CBTLV1G125CRE4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74CBTLV1G125CRE4 meets industry standards.

7.What is the process for return or replacement of 74CBTLV1G125CRE4?

All 74CBTLV1G125CRE4 units undergo pre-shipment inspection (PSI). If there is an issue with 74CBTLV1G125CRE4, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 74CBTLV1G125CRE4 part is unused and in its original packaging.

Return procedure for 74CBTLV1G125CRE4:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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