Nexperia USA Inc. 74HC123D,653
- Part No.:
- 74HC123D,653
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Multivibrators
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
74HC123D,653.pdf
- Description:
- IC MULTIVIBRATOR 65NS 16SO
- Quantity:
- Payment:

- Shipping:

Inventory:8,422
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Product details
Overview
74HC123D,653 from Nexperia is a dual retriggerable monostable multivibrator in SO16 package, operating from 2.0 V to 6.0 V supply, with independent Schmitt-trigger inputs (1A/1B/2A/2B), direct reset (1RD/2RD), and externally programmable pulse width via REXT/CEXT networks. It delivers precise timing control for pulse extension, delay generation, and debouncing in digital logic systems.
For engineers reviewing the 74HC123D,653 datasheet, 74HC123D,653 pinout, 74HC123D,653 application, or 74HC123D,653 equivalent, this device supports retriggerable one-shot operation up to 100% duty factor, features TTL-compatible input thresholds in HCT variant, and enables robust noise-immune edge detection across industrial temperature range (–40 °C to +125 °C).
Technical Context
The 74HC123D implements two independent monostable circuits, each with dual edge-triggered inputs (negative-edge on nA, positive-edge on nB), active-low direct reset (nRD), and complementary outputs (nQ HIGH / nQ LOW). Pulse width is set by external REXT and CEXT components, with typical tW = 450 μs at REXT = 10 kΩ and CEXT = 100 nF (VCC = 5.0 V).
Schmitt-trigger action on all trigger inputs (except nRD) ensures immunity to slow-rising/falling signals; clamp diodes allow interfacing to voltages exceeding VCC using current-limiting resistors. Reset propagation delay is as low as 19 ns (VCC = 6.0 V), and retrigger time is 110 ns under standard conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 2.0 V to 6.0 V - supports mixed-voltage system integration and battery-powered operation down to 2 V. |
| Operating Temperature | –40 °C to +125 °C - qualified for automotive under-hood and industrial control environments. |
| Pulse Width Range | 75 ns to >100 ms - programmable via REXT (2–1000 kΩ) and CEXT (0 pF to >10 nF); K-factor varies with VCC. |
| Propagation Delay | 19–385 ns - tpd from nA/nB/nRD to nQ/nQ depends on VCC and load; 24 ns typical at VCC = 6.0 V. |
| Input Thresholds | VIH = 4.2 V / VIL = 1.8 V at VCC = 6.0 V - CMOS-level compatibility ensures clean switching margins. |
| Output Drive | ±5.2 mA - sufficient to drive 10 LS-TTL loads or directly interface with microcontroller GPIOs. |
| Power Dissipation | 80 μA ICC typical at VCC = 6.0 V - ultra-low quiescent current enables always-on timing functions. |
Pinout & Package
74HC123D,653 uses the SO16 (SOT109-1) plastic small outline package: 16-pin, 3.9 mm body width, gull-wing leads, JEDEC MS-012 compliant. Pin 1 index marked, lead pitch 1.27 mm, RoHS-compliant matte tin finish.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1A | Negative-edge triggered input (Channel 1) | Triggers monostable on falling edge; internal Schmitt trigger rejects noise on slow transitions. |
| 1B | Positive-edge triggered input (Channel 1) | Triggers monostable on rising edge; enables flexible edge selection per channel. |
| 1RD | Direct reset input (Channel 1) | Active-Low asynchronous termination of output pulse; also accepts positive-edge reset. |
| 1Q | Active-HIGH output (Channel 1) | Complementary to 1Q; drives HIGH during monostable timeout period. |
| 1Q | Active-LOW output (Channel 1) | Drives LOW during monostable timeout; used for inverted logic control or LED sinking. |
| 1CEXT | External capacitor connection (Channel 1) | Connects timing capacitor to GND; recommended to ground externally for noise reduction. |
| 1REXT/CEXT | Resistor/capacitor timing node (Channel 1) | Joint connection point for REXT and CEXT; sets base pulse width per channel. |
| GND | Ground reference (Pin 8) | Primary return path for all internal logic and timing currents; must be low-impedance. |
| VCC | Supply voltage (Pin 16) | Power rail for CMOS logic core; decoupling capacitor (100 nF) required near pin. |
| 2A, 2B, 2RD, 2Q, 2Q, 2CEXT, 2REXT/CEXT | Identical functions for Channel 2 | Dual independent channels share no internal coupling; fully isolated timing paths. |
Key Features
| Feature | Design Value |
|---|---|
| Retriggerable operation | Enables indefinite pulse extension via successive triggers - ideal for watchdog timeouts and variable-delay generators. |
| Schmitt-trigger inputs | Eliminates need for external hysteresis; tolerates input rise/fall times up to 139 ns/V at VCC = 4.5 V. |
| Clamp diode protection | Permits safe interfacing to voltages > VCC using series current-limiting resistors - simplifies level-shifting. |
| Wide temperature range | Specified from –40 °C to +125 °C - validated for automotive engine control units and industrial PLCs. |
| Low dynamic power | CPD = 54 pF per monostable - minimizes switching losses in high-frequency timing applications. |
Applications
| Industrial Motor Control | Automotive Body Electronics |
|---|---|
|
Use Scenario: Debounce mechanical relay contacts and switch inputs in motor starter logic. IC Role / Device Role / Timing Role: Monostable acts as hardware-based contact bounce filter with adjustable hold time (e.g., 10–100 ms). Use Value: Eliminates firmware polling overhead and prevents false starts caused by microsecond-scale contact chatter. |
Use Scenario: Generate timed window for door lock/unlock command validation after key fob signal reception. IC Role / Device Role / Timing Role: Provides precise 250 ms enable pulse to solenoid driver IC upon valid RF decode. Use Value: Ensures mechanical actuation completes before power-down; avoids partial lock/unlock states. |
| Test Equipment Signal Conditioning | Medical Diagnostic Instrumentation |
|
Use Scenario: Stretch narrow pulses from photodiode detectors into measurable widths for ADC sampling. IC Role / Device Role / Timing Role: Converts sub-100 ns optical event pulses into ≥1 μs logic-level windows for microcontroller capture. Use Value: Enables reliable edge detection without high-speed logic or FPGA resources; reduces BOM cost. |
Use Scenario: Gate analog sensor acquisition windows in portable ECG monitors during heartbeat intervals. IC Role / Device Role / Timing Role: Generates synchronized 5 ms sampling enable pulse triggered by QRS complex detection circuit. Use Value: Reduces analog front-end power consumption by >70% versus continuous sampling mode. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar monostable multivibrator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 74HCT123D,653 | TTL-compatible inputs (VIH = 2.0 V min), identical pinout and timing behavior. | Better suited for legacy 5 V TTL systems; requires no level translation when driving 74LS loads. | Select when interfacing with older 5 V logic families or where input threshold consistency with TTL is critical. |
| SN74LV123ADR | Lower VCC range (2.0–5.5 V), higher speed (tpd = 11 ns typ at VCC = 5 V), LV-CMOS process. | Optimized for low-voltage, high-speed applications; lacks clamp diodes and Schmitt inputs. | Choose for battery-powered portable devices requiring <10 ns propagation delay and 3.3 V operation. |
Compared with 74HCT123D,653, the original part offers broader supply flexibility and superior noise immunity; versus SN74LV123ADR, it trades raw speed for robustness in electrically noisy environments and wider voltage tolerance.
Availability
74HC123D,653 is available at Aetrix Electronics and suitable for industrial motor control, automotive body electronics, test equipment signal conditioning, and medical diagnostic instrumentation requiring stable component supply across extended temperature ranges.
Supply support for 74HC123D,653 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance logic, discrete, and MOSFET solutions with focus on efficiency, reliability, and sustainability.
The 74HC123 belongs to Nexperia's industry-standard HC logic family, designed for robust, low-power digital timing and waveform shaping in harsh environments.
FAQ
What is the minimum external timing capacitor value supported for stable operation?
The datasheet specifies stable operation with CEXT ≥ 0 pF, but recommends CEXT ≥ 100 pF for predictable pulse width accuracy. At CEXT < 10 nF, inherent pin capacitance (~7 pF at pins 7 and 15) dominates timing; below 100 pF, pulse width variation increases significantly due to parasitic effects and process spread.
Can both trigger inputs (nA and nB) be used simultaneously on the same channel?
Yes - nA (negative-edge) and nB (positive-edge) are logically OR'd internally per channel. Either can independently trigger or retrigger the monostable; simultaneous assertion is allowed and results in a single unified output pulse extension, not double triggering.
How does the reset input (nRD) interact with an ongoing output pulse?
An active-Low nRD signal terminates the current output pulse immediately, forcing nQ LOW and nQ HIGH regardless of remaining timer duration. The reset is asynchronous and overrides all trigger activity; pulse restart requires a new valid edge on nA or nB after nRD returns HIGH.
Is the 74HC123D,653 compatible with 3.3 V logic systems?
Yes - the 74HC123D operates reliably from 2.0 V to 6.0 V, including 3.3 V nominal supply. Input thresholds scale with VCC (VIH ≈ 0.7×VCC), ensuring correct recognition of 3.3 V logic levels; output VOH exceeds 3.0 V at IO = –4 mA, compatible with 3.3 V CMOS inputs.
74HC123D,653 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74HC
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Monostable
- Independent Circuits:
- 2
- Schmitt Trigger Input:
- No
- Propagation Delay:
- 65 ns
- Current - Output High, Low:
- 5.2mA, 5.2mA
- Voltage - Supply:
- 2 V ~ 6 V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SO
74HC123D,653 FAQ
1.How can I place an order for 74HC123D,653 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74HC123D,653 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74HC123D,653 reliable?
The price and inventory of 74HC123D,653 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74HC123D,653 is usually 5 days.
3.What payment methods are accepted for 74HC123D,653?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74HC123D,653 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74HC123D,653?
74HC123D,653 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74HC123D,653 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74HC123D,653?
For technical support, including 74HC123D,653 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74HC123D,653 requirements.
6.How does Aetrix verify that 74HC123D,653 is sourced from the original manufacturer or authorized distributors?
All 74HC123D,653 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74HC123D,653 meets industry standards.
7.What is the process for return or replacement of 74HC123D,653?
All 74HC123D,653 units undergo pre-shipment inspection (PSI). If there is an issue with 74HC123D,653, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74HC123D,653 part is unused and in its original packaging.
Return procedure for 74HC123D,653:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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