Nexperia USA Inc. 74HC138D-Q100,118
- Part No.:
- 74HC138D-Q100,118
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
74HC138D-Q100,118.pdf
- Description:
- IC DECODER/DEMUX 1 X 3:8 16SO
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
74HC138D-Q100 from Nexperia is an automotive-qualified 3-to-8 line inverting decoder/demultiplexer with CMOS logic levels, operating from 2.0 V to 6.0 V supply, featuring three enable inputs (E1, E2 active LOW; E3 active HIGH), eight mutually exclusive active LOW outputs (Y0–Y7), and AEC-Q100 Grade 1 qualification for use in engine control units and body electronics.
For engineers reviewing the 74HC138D-Q100 datasheet, 74HC138D-Q100 pinout, 74HC138D-Q100 application, or 74HC138D-Q100 equivalent, key selection considerations include its wide VCC range (2.0–6.0 V), propagation delay of 12 ns at VCC = 6.0 V, -40 °C to +125 °C operating temperature, SO16 package with side-wettable flanks, and compatibility with memory chip select decoding and parallel expansion to 1-of-32 decoding.
Technical Context
The device implements a 3-input binary address decoder with fully decoded, mutually exclusive active LOW outputs-only one output goes LOW per valid input combination when all enables are satisfied (E1 = LOW, E2 = LOW, E3 = HIGH). Its triple-enable architecture supports cascading via external inversion to build larger decoding trees without additional logic gates.
Input clamping diodes allow safe interfacing to voltages exceeding VCC when used with current-limiting resistors. The device lacks 3-state outputs, so all outputs are permanently driven-either HIGH (inactive) or LOW (active)-making it unsuitable for bus multiplexing but ideal for fixed-select applications like memory mapping and peripheral enable routing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage (VCC) | 2.0 V to 6.0 V - supports mixed-voltage system integration including 3.3 V and 5 V domains without level shifters. |
| Propagation Delay (tpd) | 12 ns (max) at VCC = 6.0 V, CL = 50 pF - enables reliable operation in high-speed address decoding up to ~40 MHz clock-equivalent systems. |
| Operating Temperature | -40 °C to +125 °C - qualified per AEC-Q100 Grade 1 for under-hood automotive environments. |
| Output Drive Strength | ±4.0 mA (IOH/ IOL) at VCC = 4.5 V - sufficient to directly drive TTL loads or multiple CMOS inputs without buffering. |
| Input Thresholds | VIH = 4.2 V, VIL = 1.8 V at VCC = 6.0 V - ensures robust noise immunity (>1.2 V DC noise margin) in electrically noisy vehicle subsystems. |
| Power Dissipation | CPD = 67 pF - determines dynamic power as PD = CPD × VCC² × fi × N; enables low-power operation at typical automotive MCU clock rates. |
| ESD Protection | HBM > 2000 V, CDM > 1000 V - meets stringent automotive ESD requirements for assembly and field reliability. |
Pinout & Package
74HC138D-Q100 is housed in a plastic small outline package (SO16), SOT109-1, with 16 leads, 3.9 mm body width, and side-wettable flanks for automated optical inspection (AOI) of solder joints.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3 (A0, A1, A2) | Binary address inputs | Three-bit weighted address lines determining which of eight outputs activates; LSB-to-MSB order matches standard memory addressing conventions. |
| 4, 5 (E1, E2) | Active LOW enable inputs | Both must be LOW to permit decoding; enables hierarchical enable tree construction across multiple decoders. |
| 6 (E3) | Active HIGH enable input | Must be HIGH to activate decoding; complements E1/E2 for flexible multi-level gating and demultiplexing mode. |
| 7, 9–15 (Y0–Y7) | Active LOW decoded outputs | Only one output is LOW per valid address/enable condition; outputs are non-overlapping and fully decoded for unambiguous chip select. |
| 8 (GND) | Ground reference | Primary 0 V return path for all internal logic and output drivers; requires low-impedance PCB connection for noise control. |
| 16 (VCC) | Positive supply rail | Single supply powering all internal CMOS circuitry and output stages; bypass capacitor (100 nF) recommended near pin. |
Key Features
| Feature | Design Value |
|---|---|
| AEC-Q100 Grade 1 qualification | Validated for automotive use from -40 °C to +125 °C ambient, including thermal cycling, humidity, and vibration stress testing. |
| Multiple enable architecture | E1/E2 (LOW) + E3 (HIGH) allows daisy-chaining four ICs + one inverter to implement 5-to-32 line decoding without external logic gates. |
| Inverting demultiplexer mode | One enable input (e.g., E1) serves as data input while others act as strobes-enabling 1-to-8 signal distribution with inverted polarity. |
| Clamp diode-equipped inputs | Permits safe interface to signals up to VCC + 0.5 V using series resistors-critical for legacy 5 V signals driving 3.3 V logic domains. |
| SO16 with side-wettable flanks | Enables automated optical inspection (AOI) of solder joint quality on bottom-side leads-improving manufacturing yield in automotive PCB assembly. |
Applications
| Engine Control Unit (ECU) Memory Mapping | Automotive Body Control Module (BCM) |
|---|---|
|
Use Scenario: Selecting among multiple flash memory banks and peripheral registers in a 32-bit microcontroller-based ECU. IC Role / Device Role / Timing Role: Address decoder translating 3-bit segment bits into individual chip select (CS#) lines for up to eight memory-mapped devices. Use Value: Eliminates need for discrete logic or FPGA resources; provides deterministic, glitch-free CS# assertion synchronized to address bus transitions. |
Use Scenario: Enabling discrete power switches for lighting zones (headlamps, fog lamps, interior LEDs) based on CAN command payload. IC Role / Device Role / Timing Role: Demultiplexer routing a single enable signal to one of eight output drivers, with polarity matching MOSFET gate logic. Use Value: Reduces MCU GPIO count by 7 pins; leverages built-in enable gating to prevent unintended simultaneous activation during state transitions. |
| Instrument Cluster Display Interface | ADAS Camera Sensor Hub |
|
Use Scenario: Decoding SPI register addresses for multiple display driver ICs (TFT, segment LCD, LED backlight controllers) sharing one serial bus. IC Role / Device Role / Timing Role: Address decoder generating dedicated chip select lines synchronized to SPI frame boundaries. Use Value: Ensures zero-latency, contention-free access to each display IC; avoids software overhead of bit-banged address decoding. |
Use Scenario: Routing camera sensor data streams (MIPI CSI-2 lanes) to different image processing paths based on resolution mode. IC Role / Device Role / Timing Role: Enable controller selecting one of eight video path buffers or serializer channels using static configuration bits. Use Value: Provides hardware-level routing stability unaffected by software interrupts or RTOS scheduling jitter-critical for real-time vision pipelines. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 3-to-8 decoder/demultiplexer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 74HCT138D-Q100 | TTL-compatible inputs (VIH = 2.0 V min at VCC = 4.5–5.5 V); identical pinout, timing, and packaging. | Better suited for mixed-technology systems with legacy 5 V TTL outputs; slightly higher ICC at VCC = 5.5 V (160 μA max). | Select when interfacing directly to 5 V microcontrollers or FPGAs without level shifters. |
| SN74LS138DR | Bipolar TTL technology; VCC = 4.75–5.25 V only; propagation delay ~22 ns; no AEC-Q100 qualification. | Limited to commercial/industrial temperature range (-40 °C to +85 °C); higher power consumption (~30 mW typical). | Use only in non-automotive, cost-sensitive designs where AEC-Q100 and extended temperature are not required. |
Compared with 74HC138D-Q100, the 74HCT138D-Q100 offers seamless 5 V TTL interoperability at identical footprint and timing, while the SN74LS138DR trades automotive qualification and low power for legacy TTL compatibility and lower unit cost-making the HC variant optimal for new automotive designs requiring robustness and voltage flexibility.
Availability
74HC138D-Q100 is available at Aetrix Electronics and suitable for engine control units, body control modules, instrument clusters, and ADAS sensor hubs requiring stable component supply across automotive production lifecycles.
Supply support for 74HC138D-Q100 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance, reliable components for automotive, industrial, and consumer applications, with leadership in logic, analog, and MOSFET technologies.
The 74HC138D-Q100 belongs to Nexperia's automotive-qualified logic portfolio, designed specifically for robust address decoding and signal routing in harsh-temperature, safety-critical vehicle subsystems.
FAQ
What is the maximum clock frequency supported by the 74HC138D-Q100?
The 74HC138D-Q100 does not operate on a clock signal-it is combinational logic. Its speed is defined by propagation delay: 12 ns maximum at VCC = 6.0 V and CL = 50 pF. This corresponds to a maximum usable address transition rate of approximately 40 MHz in worst-case conditions, assuming clean edges and proper load management.
Can the 74HC138D-Q100 be used as a demultiplexer, and how?
Yes-by using one enable input (e.g., E1) as the data input and the remaining enables (E2, E3) as strobes, the device functions as an active LOW 1-to-8 demultiplexer. When E2 and E3 are set to enable the device, the data applied to E1 appears inverted on the selected Yx output determined by A0–A2, while all other outputs remain HIGH.
Does the 74HC138D-Q100 support 3.3 V operation?
Yes-the 74HC138D-Q100 is fully specified for VCC = 2.0 V to 6.0 V, including 3.3 V nominal supply. At VCC = 3.3 V, VIH = 2.31 V (min), VIL = 1.32 V (max), and tpd ≈ 18 ns (typical), making it compatible with modern 3.3 V microcontrollers and FPGAs without level translation.
Is there a pin-compatible 3.3 V-only alternative with better noise immunity?
No pin-compatible 3.3 V-only variant exists in Nexperia's Q100 portfolio. The 74LVC138AD-Q100 is functionally similar but operates only from 1.65 V to 3.6 V and features higher noise immunity (VIH = 2.0 V min at VCC = 3.3 V) and faster tpd (5.5 ns typ), though it requires redesign due to different pinout and package (TSSOP16 only).
74HC138D-Q100,118 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74HC
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Decoder/Demultiplexer
- Circuit:
- 1 x 3:8
- Independent Circuits:
- 1
- Current - Output High, Low:
- 5.2mA, 5.2mA
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 2V ~ 6V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SO
74HC138D-Q100,118 FAQ
1.How can I place an order for 74HC138D-Q100,118 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74HC138D-Q100,118 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74HC138D-Q100,118 reliable?
The price and inventory of 74HC138D-Q100,118 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74HC138D-Q100,118 is usually 5 days.
3.What payment methods are accepted for 74HC138D-Q100,118?
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4.How is shipping managed for 74HC138D-Q100,118?
74HC138D-Q100,118 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74HC138D-Q100,118 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74HC138D-Q100,118?
For technical support, including 74HC138D-Q100,118 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74HC138D-Q100,118 requirements.
6.How does Aetrix verify that 74HC138D-Q100,118 is sourced from the original manufacturer or authorized distributors?
All 74HC138D-Q100,118 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74HC138D-Q100,118 meets industry standards.
7.What is the process for return or replacement of 74HC138D-Q100,118?
All 74HC138D-Q100,118 units undergo pre-shipment inspection (PSI). If there is an issue with 74HC138D-Q100,118, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74HC138D-Q100,118 part is unused and in its original packaging.
Return procedure for 74HC138D-Q100,118:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74HC138D-Q100,118 Tags
-
SN74HC138DR
Texas Instruments

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TC7SB3157CFU,LF(CT
Toshiba Semiconductor and Storage

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74CBTLV3257PW,118
Nexperia USA Inc.
-
SN74CBTLV3257PWR
Texas Instruments

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74CBTLV3257GUX
Nexperia USA Inc.

-
74HC154BQ,118
Nexperia USA Inc.

-
P3S0200GMX
NXP USA Inc.

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SN74CB3Q3245PWR
Texas Instruments
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SN74CB3Q3257RGYR
Texas Instruments

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TCA9543APWR
Texas Instruments
-
TCA9546APWR
Texas Instruments

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SN74HC138N
Texas Instruments
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