NXP Semiconductors 74HC139N,652
- Part No.:
- 74HC139N,652
- Manufacturer:
- NXP Semiconductors
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 16-DIP (0.300", 7.62mm)
- Datasheet:
-
74HC139N,652.pdf
- Description:
- IC DECODER/DEMUX 1X2:4 16DIP
- Quantity:
- Payment:

- Shipping:

Inventory:4,055
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
74HC139N,652 from NXP Semiconductors is a dual 2-to-4 line decoder/demultiplexer in 16-pin DIP package, operating at 2–6 V supply, with typical propagation delay of 11 ns (nA→nY) at 5 V, active LOW outputs, and independent enable-controlled decoding paths. It serves in memory address decoding and data routing within TTL- and CMOS-compatible digital systems.
For engineers reviewing the 74HC139N,652 datasheet, 74HC139N,652 pinout, 74HC139N,652 application, or 74HC139N,652 equivalent, key selection criteria include enable-controlled demultiplexing, dual-decoder independence, active LOW output logic, standard-output drive capability, and compatibility with 74HCT-level input thresholds.
Technical Context
The 74HC139N,652 implements two fully independent 2-to-4 decoders, each with binary address inputs (nA0/nA1), active LOW enable (nE), and four mutually exclusive active LOW outputs (nY0–nY3). Enable input functions as data input in demultiplexer mode, allowing 1-to-4 signal distribution per section.
It uses high-speed Si-gate CMOS technology, meets JEDEC Std 7A, and is pin compatible with LSTTL. Input thresholds follow HC logic levels (VI = GND to VCC), and output drive matches standard CMOS loads without buffer amplification.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 2.0–6.0 V - supports mixed-voltage system interfacing and battery-powered logic |
| Propagation Delay (nA→nY) | 11 ns typ. @ 5 V, CL = 15 pF - enables ≤45 MHz address decode timing in synchronous systems |
| Propagation Delay (nE→nY) | 10 ns typ. @ 5 V, CL = 15 pF - ensures fast enable-controlled channel switching for demux operation |
| Output Logic Polarity | Active LOW - directly drives common-cathode LED arrays, NAND-based enable trees, or reset lines |
| Input Capacitance | 3.5 pF - minimizes loading on preceding gate outputs and preserves signal edge integrity |
| Power Dissipation Cap. (CPD) | 42 pF - used to calculate dynamic power: PD = CPD × VCC² × fi + Σ(CL × VCC² × fo) |
Pinout & Package
74HC139N,652 is supplied in a 16-pin plastic dual in-line package (DIP) with 0.3-inch body width and through-hole mounting. Pin 1 is marked with a notch or dot; pin numbering follows standard DIP convention (counterclockwise from top-left).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 15 | 1E, 2E | Active LOW enable inputs - disable all outputs when HIGH; serve as data input in demux mode |
| 2, 3 | 1A0, 1A1 | Binary address inputs for Decoder 1 - select one of four active LOW outputs (1Y0–1Y3) |
| 4–7 | 1Y0–1Y3 | Decoder 1 outputs - mutually exclusive, active LOW, standard-drive CMOS outputs |
| 8 | GND | Ground reference - required for logic threshold stability and noise immunity |
| 9–12 | 2Y0–2Y3 | Decoder 2 outputs - functionally identical to 1Y0–1Y3, electrically isolated |
| 13, 14 | 2A0, 2A1 | Binary address inputs for Decoder 2 - independent control of second 2-to-4 decode path |
| 16 | VCC | Positive supply - powers both decoders; must be decoupled locally to suppress switching noise |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent decoders | Enables simultaneous 2-to-4 decoding for separate address spaces or parallel data paths without crosstalk |
| Active LOW mutually exclusive outputs | Guarantees only one output LOW per decoder at any time - eliminates bus contention in wired-OR configurations |
| Enable-as-data demultiplexing | Permits 1-to-4 signal distribution using nE as serial data input and nA0/nA1 as channel select |
| LSTTL pin compatibility | Allows direct replacement of 74LS139 in legacy designs without PCB modification or level-shifting |
Applications
| Memory Address Decoding | Data Routing Switch |
|---|---|
Use Scenario: Selecting one of four RAM/ROM chips in an 8-bit microcontroller system using upper address bits. IC Role / Device Role / Timing Role: Dual decoder maps A15/A14 to chip-select lines, with each decoder enabling one pair of memory banks. Use Value: Eliminates need for discrete NAND gates; reduces propagation delay versus cascaded logic by 30%. | Use Scenario: Distributing a single serial control signal to four peripheral modules based on configuration register bits. IC Role / Device Role / Timing Role: Functions as 1-to-4 demultiplexer using nE as data input and nA0/nA1 as 2-bit channel address. Use Value: Provides deterministic, glitch-free channel selection with sub-12 ns enable-to-output latency. |
| Code Conversion | LED Segment Driver Interface |
Use Scenario: Converting 2-bit BCD or state-machine outputs into four discrete control flags for combinational logic blocks. IC Role / Device Role / Timing Role: Translates compact binary codes into orthogonal active-LOW enable signals for downstream latches or gates. Use Value: Reduces fan-out burden on source logic and avoids timing skew across four parallel paths. | Use Scenario: Driving common-cathode 7-segment display digit selectors where only one digit is active at a time. IC Role / Device Role / Timing Role: Supplies mutually exclusive active LOW digit-enable signals synchronized to display refresh clock. Use Value: Ensures zero overlap between digit activations - prevents ghosting and current surges in multiplexed displays. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual 2-to-4 decoder/demultiplexer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 74HCT139N,652 | TTL-compatible input thresholds (VIH = 2.0 V min); otherwise identical pinout, timing, and function | Required when interfacing with 5 V TTL or LSTTL sources without level shifters | Select when driving from legacy 74LS/74ALS logic; retains same PCB layout and decode behavior |
| SN74LS139N | Bipolar TTL technology; higher ICC (18 mA max), slower propagation (25 ns typ.), narrower VCC range (4.75–5.25 V) | Used in legacy 5 V-only systems where CMOS power savings are not required | Choose only for drop-in replacement in existing LS-based designs; not suitable for 3.3 V or low-power use |
Compared with 74HC139N,652, the 74HCT139N,652 offers identical functionality with TTL-level inputs, while SN74LS139N provides legacy bipolar performance at higher power and reduced voltage flexibility - making the HC variant optimal for new 2–6 V mixed-signal or battery-operated designs.
Availability
74HC139N,652 is available at Aetrix Electronics and suitable for memory decoding, data routing, code conversion, and LED multiplexing applications requiring stable component supply, long-term industrial availability, and RoHS-compliant through-hole logic.
Supply support for 74HC139N,652 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications, with deep heritage in logic IC design dating to Philips Semiconductor.
The 74HC139N,652 belongs to the 74HC/HCT high-speed CMOS logic family, engineered for low-power, pin-compatible upgrades of TTL logic in general-purpose digital systems - emphasizing reliability, wide supply range, and interoperability across voltage domains.
FAQ
What is the supply voltage range supported by the 74HC139N,652?
The 74HC139N,652 operates over a supply voltage range of 2.0 V to 6.0 V. This wide range allows direct integration into both 3.3 V and 5 V digital systems without level translation. The device maintains specified timing and output drive across this range, with propagation delays degrading predictably below 2 V or above 6 V - outside which 74HC139N,652 is not guaranteed to function correctly.
Does the 74HC139N,652 support demultiplexer operation?
Yes, the 74HC139N,652 supports demultiplexer operation via its active LOW enable inputs (1E and 2E). When used as a 1-to-4 demux, the enable pin acts as the data input while A0 and A1 serve as the 2-bit channel select. Each decoder section of the 74HC139N,652 can independently perform this function, enabling two concurrent 1-to-4 signal distributions.
Are the outputs of the 74HC139N,652 actively driven HIGH or only pulled HIGH?
The outputs of the 74HC139N,652 are actively driven LOW and weakly pulled HIGH via internal CMOS pull-ups. They are specified as "standard output capability", meaning they source minimal current in HIGH state (typically < 20 µA) but sink up to 4 mA in LOW state. This asymmetry makes the 74HC139N,652 ideal for driving active LOW loads such as reset lines or common-cathode LEDs.
Can the 74HC139N,652 replace a 74LS139 in an existing design?
Yes, the 74HC139N,652 is pin compatible with the 74LS139 and shares identical pinout and logic function. However, due to CMOS input structure, it draws significantly less quiescent current and operates over a wider voltage range. To ensure reliable operation, verify that driving sources meet HC input voltage thresholds (VIH ≥ 3.5 V at VCC = 5 V); if interfacing with older TTL, consider 74HCT139N,652 instead.
What is the maximum operating temperature range for the 74HC139N,652?
The 74HC139N,652 is rated for operation from −40 °C to +125 °C, meeting industrial-grade thermal requirements. This rating is confirmed in the AC characteristics tables of the official datasheet, where propagation delays and transition times are specified across the full −40 °C to +125 °C range at VCC = 2.0 V, 4.5 V, and 6.0 V - ensuring robust performance in extended-temperature embedded environments.
74HC139N,652 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- 74HC
- Package/Case:
- 16-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Type:
- Decoder/Demultiplexer
- Circuit:
- 1 x 2:4
- Independent Circuits:
- 2
- Current - Output High, Low:
- 5.2mA, 5.2mA
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 2V ~ 6V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 16-DIP
74HC139N,652 FAQ
1.How can I place an order for 74HC139N,652 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74HC139N,652 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74HC139N,652 reliable?
The price and inventory of 74HC139N,652 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74HC139N,652 is usually 5 days.
3.What payment methods are accepted for 74HC139N,652?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74HC139N,652 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74HC139N,652?
74HC139N,652 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74HC139N,652 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74HC139N,652?
For technical support, including 74HC139N,652 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74HC139N,652 requirements.
6.How does Aetrix verify that 74HC139N,652 is sourced from the original manufacturer or authorized distributors?
All 74HC139N,652 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74HC139N,652 meets industry standards.
7.What is the process for return or replacement of 74HC139N,652?
All 74HC139N,652 units undergo pre-shipment inspection (PSI). If there is an issue with 74HC139N,652, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74HC139N,652 part is unused and in its original packaging.
Return procedure for 74HC139N,652:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74HC139N,652 Tags
-
SN74HC138DR
Texas Instruments

-
TC7SB3157CFU,LF(CT
Toshiba Semiconductor and Storage

-
74CBTLV3257PW,118
Nexperia USA Inc.
-
SN74CBTLV3257PWR
Texas Instruments

-
74CBTLV3257GUX
Nexperia USA Inc.

-
74HC154BQ,118
Nexperia USA Inc.

-
P3S0200GMX
NXP USA Inc.

-
SN74CB3Q3245PWR
Texas Instruments
-
SN74CB3Q3257RGYR
Texas Instruments

-
TCA9543APWR
Texas Instruments
-
TCA9546APWR
Texas Instruments

-
SN74HC138N
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

