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NXP Semiconductors 74HC390D,652
- Part No.:
- 74HC390D,652
- Manufacturer:
- NXP Semiconductors
- Category:
- Counters, Dividers
- Package:
- -
- Datasheet:
-
74HC390D,652.pdf
- Description:
- NEXPERIA 74HC390D - DECADE COUNT
- Quantity:
- Payment:
- Shipping:
Inventory:16,852
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Product details
Overview
74HC390D,652 from Nexperia is a dual 4-bit decade ripple counter IC with two independent divide-by-2 and two divide-by-5 sections, asynchronous master reset inputs (1MR/2MR), HIGH-to-LOW edge-triggered clocks (1CP0/1CP1/2CP0/2CP1), and BCD/bi-quinary configuration capability for frequency division up to ÷100. It operates from 4.5 V to 5.5 V and supports industrial temperature range (−40 °C to +125 °C) in SO16 package.
For engineers reviewing the 74HC390D,652 datasheet, 74HC390D,652 pinout, 74HC390D,652 application, or 74HC390D,652 equivalent, this device serves as a programmable ripple counter for clock division, digital timing control, and decade counting in embedded instrumentation, industrial logic sequencers, and legacy TTL/CMOS interface systems where precise asynchronous division ratios are required.
Technical Context
The 74HC390D,652 implements two physically separate 4-bit ripple counters - each composed of cascaded flip-flops forming one ÷2 stage and one ÷5 stage - enabling configurable decade counting via external feedback (e.g., 1Q0→2CP1 for BCD or 1Q3→2CP0 for bi-quinary). Its asynchronous master reset (1MR/2MR) overrides all clock activity and forces outputs LOW independently per section.
Each counter section accepts HIGH-to-LOW clock transitions only; no internal synchronization is performed. The device uses standard CMOS logic levels (VIH = 3.15 V min at VCC = 4.5 V, VIL = 1.35 V max), includes input clamp diodes for overvoltage tolerance, and delivers propagation delays as low as 14 ns (VCC = 6.0 V, CL = 50 pF) from clock to Q0 output.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Function | Dual decade ripple counter with independent ÷2 and ÷5 sections per decade; supports BCD and bi-quinary modes via external feedback routing. |
| Supply Voltage | 4.5 V to 5.5 V - ensures compatibility with 5 V TTL and mixed-signal systems; not rated for 3.3 V operation. |
| Operating Temperature | −40 °C to +125 °C - qualified for extended industrial environments without derating. |
| Max Clock Frequency | 55 MHz at VCC = 4.5 V (CL = 15 pF) - enables high-speed division in timing chains before final stage buffering. |
| Propagation Delay | 17 ns (1CP0 → 1Q0, VCC = 4.5 V, CL = 50 pF) - defines minimum clock period for reliable ripple-stage chaining. |
| Output Drive | ±4.0 mA (VOH/VOL at VCC = 4.5 V) - sufficient to drive 10 LS-TTL loads or directly interface to 74HC-series inputs. |
| Input Thresholds | VIH = 3.15 V min, VIL = 1.35 V max (VCC = 4.5 V) - CMOS-level thresholds compatible with 5 V logic families. |
Pinout & Package
74HC390D,652 is housed in a plastic small outline package (SO16, SOT109-1) with 16 leads and 3.9 mm body width. Pin 1 is index-marked; pin 8 is GND; pin 16 is VCC.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1CP0, 2CP0 | ÷2 section clock input | HIGH-to-LOW edge-triggered; initiates toggle of Q0 output in respective decade counter. |
| 1CP1, 2CP1 | ÷5 section clock input | HIGH-to-LOW edge-triggered; advances Q1–Q3 outputs after Q0 toggles; requires external feedback for decade mode. |
| 1MR, 2MR | Asynchronous master reset | Active-HIGH; forces all four outputs (Q0–Q3) LOW regardless of clock state; resets counter to zero immediately. |
| 1Q0–1Q3, 2Q0–2Q3 | Flip-flop outputs | Binary-coded outputs per decade; Q0 is LSB; used for feedback routing (e.g., 1Q0→2CP1) or system timing signals. |
| VCC (Pin 16) | Positive supply | 4.5–5.5 V DC; decoupling capacitor (100 nF) recommended adjacent to pin for noise immunity. |
| GND (Pin 8) | Ground reference | 0 V return path for all internal logic and output drivers; must be low-impedance connection. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent decade counters | Two fully isolated 4-bit ripple counters on one die - eliminates board space and interconnect delay vs. discrete ICs. |
| Configurable division ratios | Supports ÷2, ÷4, ÷5, ÷10, ÷20, ÷25, ÷50, and ÷100 via internal section selection and external feedback wiring. |
| Asynchronous reset per section | 1MR and 2MR allow independent zeroing of each decade counter without affecting the other - critical for multi-phase timing alignment. |
| CMOS input compatibility | Clamp diodes + TTL-compatible VIH/VIL thresholds enable robust interfacing to both 5 V CMOS and legacy TTL sources. |
| High noise immunity | Guaranteed 400 mV noise margin at VCC = 4.5 V - suppresses false triggering in electrically noisy industrial enclosures. |
Applications
| Industrial Digital Timer | Legacy System Clock Divider |
|---|---|
Use Scenario: A programmable 100-second countdown timer in a PLC-based packaging machine uses cascaded 74HC390D,652 sections to generate precise 1 s, 10 s, and 100 s intervals from a 100 Hz crystal oscillator. IC Role / Device Role / Timing Role: Acts as synchronous decade divider chain - first section divides 100 Hz to 10 Hz (÷10), second divides to 1 Hz (÷10), third to 0.1 Hz (÷10) - with MR pins enabling reset-on-completion. Use Value: Eliminates need for microcontroller-based timing, reducing BOM cost and firmware complexity while maintaining deterministic jitter-free division. |
Use Scenario: A retro computing restoration project replaces failed 7490 counters in a 1970s minicomputer front panel, requiring identical pinout, timing behavior, and BCD output format. IC Role / Device Role / Timing Role: Drop-in functional replacement for obsolete 7490 - configured in BCD mode (Q0→CP1) to replicate decade counting sequence with identical output polarity and reset timing. Use Value: Maintains original system timing integrity and signal compatibility without PCB redesign or firmware modification. |
| Bi-Quinary Counter for Metering | Frequency Synthesis Pre-divider |
Use Scenario: An energy meter uses bi-quinary counting (Q3→CP0) to encode kWh pulses into a 2-out-of-5 coded output for optical isolation and EMI-resistant transmission to a remote display. IC Role / Device Role / Timing Role: Implements bi-quinary decade counter per IEC 62053-21 - Q0 is decade output; Q1–Q3 encode quinary states; MR enables synchronized zero-reset at billing cycle boundaries. Use Value: Provides inherent error detection (exactly two outputs HIGH per count) and reduces EMI susceptibility versus binary encoding in high-noise utility environments. |
Use Scenario: A spectrum analyzer frontend uses 74HC390D,652 to pre-divide a 100 MHz local oscillator signal by 100 before feeding into a PLL phase detector operating at ≤1 MHz. IC Role / Device Role / Timing Role: First-stage ripple divider - configured as ÷10 × ÷10 cascade - lowers frequency while preserving edge integrity for stable PLL lock. Use Value: Enables use of lower-cost, lower-frequency PLL components without sacrificing resolution or introducing significant jitter accumulation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual decade ripple counter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 74HCT390D,652 | TTL-compatible input thresholds (VIH = 2.0 V min); identical pinout, timing, and function. | Required when driving from 5 V TTL or LSTTL sources without level-shifting; slightly higher ICC at VCC = 5.5 V. | Select for guaranteed compatibility with legacy TTL logic families; otherwise 74HC390D,652 preferred for pure CMOS systems. |
| SN74LS90N | Bipolar TTL technology; 4.75–5.25 V supply; higher power (22 mW typical); slower (45 ns max tPD); no clamp diodes. | Only suitable for direct replacement in existing LS designs; incompatible with CMOS-level inputs or wide-voltage rails. | Use only for repair of vintage TTL equipment; avoid in new designs due to power, speed, and noise limitations. |
Compared with 74HCT390D,652 and SN74LS90N, the 74HC390D,652 offers optimal balance of low power, wide supply margin, and CMOS noise immunity - making it the preferred choice for modern industrial logic where supply stability and EMI resilience are prioritized over legacy TTL interface necessity.
Availability
74HC390D,652 is available at Aetrix Electronics and suitable for industrial timers, legacy system replacements, metering interfaces, and frequency pre-division applications requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for 74HC390D,652 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, analog, and MOSFET solutions for automotive, industrial, and consumer markets.
The 74HC390D,652 belongs to Nexperia's 74HC logic family - designed specifically for robust, low-power 5 V digital control and timing applications in harsh industrial environments where latch-up immunity and wide temperature operation are essential.
FAQ
Can 74HC390D,652 operate at 3.3 V?
No. The 74HC390D,652 is specified only for 4.5 V to 5.5 V operation per its Recommended Operating Conditions (Table 6). At 3.3 V, VIH exceeds 70% of VCC, causing unreliable input recognition and potential metastability. Use 74LVC390 or similar 3.3 V–tolerant logic for lower-voltage systems.
What is the maximum fan-out to standard 74HC inputs?
At VCC = 4.5 V, the 74HC390D,652 can drive up to 10 standard 74HC inputs (each drawing ±1 μA) while maintaining VOL < 0.26 V and VOH > 3.98 V. This assumes short PCB traces (<5 cm) and proper decoupling; longer runs require buffer stages due to capacitive loading effects on rise/fall times.
How do I configure it for ÷100 division?
Connect 1Q3 to 2CP0 and 2Q0 to 1CP1, then apply input clock to 1CP0. This creates a ÷10 × ÷10 cascade: first decade (1CP0→1Q0–1Q3) feeds second decade (2CP0→2Q0–2Q3). Both MR pins must be held LOW during operation; assert either MR to reset its respective decade independently.
Does it support synchronous reset?
No. The 74HC390D,652 provides only asynchronous master reset (1MR/2MR), which forces outputs LOW immediately upon HIGH assertion, independent of clock edges. There is no synchronous reset input or internal reset register; external logic (e.g., AND gate on clock and reset) is required for edge-aligned reset behavior.
74HC390D,652 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- *
- Package/Case:
- -
- Packaging:
- Bulk
- Product Status:
- Active
- Logic Type:
- -
- Direction:
- -
- Number of Elements:
- -
- Number of Bits per Element:
- -
- Reset:
- -
- Timing:
- -
- Count Rate:
- -
- Trigger Type:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
74HC390D,652 FAQ
1.How can I place an order for 74HC390D,652 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74HC390D,652 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74HC390D,652 reliable?
The price and inventory of 74HC390D,652 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74HC390D,652 is usually 5 days.
3.What payment methods are accepted for 74HC390D,652?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74HC390D,652 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74HC390D,652?
74HC390D,652 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74HC390D,652 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74HC390D,652?
For technical support, including 74HC390D,652 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74HC390D,652 requirements.
6.How does Aetrix verify that 74HC390D,652 is sourced from the original manufacturer or authorized distributors?
All 74HC390D,652 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74HC390D,652 meets industry standards.
7.What is the process for return or replacement of 74HC390D,652?
All 74HC390D,652 units undergo pre-shipment inspection (PSI). If there is an issue with 74HC390D,652, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74HC390D,652 part is unused and in its original packaging.
Return procedure for 74HC390D,652:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74HC390D,652 Tags
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74HC393BQ,115
Nexperia USA Inc.
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SN74LV8154PWR
Texas Instruments
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MC14516BDR2G
onsemi
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MC14020BDR2G
onsemi
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onsemi
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MC100EP016AMNG
onsemi
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MC100EP016AFAG
onsemi
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SN74LV163ADR
Texas Instruments
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SN74LV163APWR
Texas Instruments
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SN74HC393DR
Texas Instruments
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SN74HC161DR
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