Nexperia USA Inc. 74HCT123D-Q100,115
- Part No.:
- 74HCT123D-Q100,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Multivibrators
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
74HCT123D-Q100,115.pdf
- Description:
- IC MULTIVIBRATOR 65NS 16SO
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
74HCT123D-Q100 from Nexperia is a dual retriggerable monostable multivibrator with independent reset inputs, designed for precise timing control in automotive systems. It operates from 4.5 V to 5.5 V, supports -40 °C to +125 °C ambient range, delivers pulse widths programmable via external REXT/CEXT (e.g., 450 μs with 10 kΩ/100 nF), and features Schmitt-trigger inputs for noise immunity. Used in engine control unit (ECU) fault pulse stretching and transmission shift timing.
For engineers reviewing the 74HCT123D-Q100 datasheet, 74HCT123D-Q100 pinout, 74HCT123D-Q100 application, or 74HCT123D-Q100 equivalent, key selection criteria include TTL-compatible input thresholds, retriggerable pulse extension capability, direct asynchronous reset behavior, and AEC-Q100 Grade 1 qualification for under-hood deployment.
Technical Context
This device implements two independent monostable circuits, each with dual edge-triggered inputs (nA: negative-edge, nB: positive-edge), a dedicated reset input (nRD), and complementary outputs (nQ, nQ). Pulse width is externally set by REXT and CEXT at pins nREXT/CEXT and nCEXT, with inherent test jig capacitance of ~7 pF at timing pins.
Retriggering extends the output pulse on successive active edges at nA or nB, enabling duty-cycle flexibility up to 100 %; reset terminates the pulse immediately on a LOW-going edge at nRD. All inputs except nRD feature Schmitt-trigger action, ensuring robust operation with slow-rising/falling signals.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 4.5 V to 5.5 V - Ensures compatibility with standard automotive 5 V rail and tolerance against load-dump transients. |
| Operating Temperature | -40 °C to +125 °C - Qualified per AEC-Q100 Grade 1 for under-hood ECU and powertrain applications. |
| Pulse Width Range | 75 ns to >450 μs - Programmable via REXT (2–1000 kΩ) and CEXT (up to 10 nF+); enables both glitch suppression and long delay generation. |
| Propagation Delay | 23–77 ns @ VCC = 4.5 V - Supports high-speed timing coordination in real-time control loops. |
| Input Thresholds | VIH = 2.0 V min, VIL = 0.8 V max - TTL-level compatibility ensures direct interfacing with legacy microcontrollers and logic families. |
| Reset Response Time | 23–69 ns @ VCC = 4.5 V - Enables deterministic termination of timing pulses during fault recovery sequences. |
| Power Dissipation | Max 500 mW (SO16) - Sufficient headroom for continuous operation in thermally constrained modules. |
Pinout & Package
74HCT123D-Q100 uses the SO16 plastic small outline package (SOT109-1), 16-pin, 3.9 mm body width, with gull-wing leads and industry-standard pin 1 index marking.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1A | Negative-edge triggered input (Channel 1) | Starts or extends Channel 1 output pulse on falling edge; enables synchronization with clock or sensor falling transitions. |
| 1B | Positive-edge triggered input (Channel 1) | Starts or extends Channel 1 output pulse on rising edge; supports trigger alignment with enable or interrupt signals. |
| 1RD | Direct reset input (Channel 1) | Asynchronously forces 1Q LOW and 1Q HIGH on LOW-going edge; critical for emergency timeout cancellation. |
| 1Q / 1Q | Complementary active-HIGH / active-LOW outputs (Channel 1) | Drive downstream logic or drivers without inversion; supports both sourcing and sinking configurations. |
| 1REXT/CEXT & 1CEXT | External timing node (Channel 1) | Connects to series REXT and shunt CEXT; defines base pulse width and sets retrigger timing constraints. |
| 2A / 2B / 2RD / 2Q / 2Q / 2REXT/CEXT / 2CEXT | Identical functions for Channel 2 | Enables independent dual-timing paths-e.g., one channel for ignition timing, second for fuel injection sequencing. |
| VCC (Pin 16) | Supply voltage input | Must be decoupled locally with ≥100 nF ceramic capacitor; shared rail with other 5 V logic in same domain. |
| GND (Pin 8) | Ground reference | Return path for all internal currents; requires low-impedance connection to system ground plane. |
Key Features
| Feature | Design Value |
|---|---|
| AEC-Q100 Grade 1 qualification | Validated for automotive use across -40 °C to +125 °C, including temperature cycling, humidity, and vibration stress tests. |
| Retriggerable monostable architecture | Allows indefinite pulse extension via repeated triggers-essential for adaptive timing windows in closed-loop control. |
| Schmitt-trigger inputs (nA/nB) | Provides hysteresis (typ. 1.67 V @ VCC = 4.5 V) to reject noise on slow-rising sensor or switch inputs. |
| Independent asynchronous reset (nRD) | Guarantees sub-70 ns pulse termination-critical for safety-critical timeout enforcement in ASIL-B systems. |
| TTL-compatible input levels | Accepts standard 5 V TTL logic without level-shifting, simplifying integration with legacy MCU GPIOs and discrete drivers. |
Applications
| Engine Control Unit Timing | Transmission Control Module |
|---|---|
Use Scenario: Generating variable-duration enable pulses for fuel injector drivers based on crankshaft position and RPM. IC Role / Device Role / Timing Role: Dual-channel monostable provides synchronized injection window (Ch1) and pre-ignition dwell time (Ch2), retriggered per cylinder event. Use Value: Enables precise fuel metering across 0–8000 RPM range with <±2% pulse width accuracy over temperature and supply variation. | Use Scenario: Implementing adaptive shift timing delays responsive to throttle position and vehicle speed. IC Role / Device Role / Timing Role: One channel generates base shift delay; second channel extends it dynamically upon detecting rapid throttle closure. Use Value: Reduces shift shock by extending clutch engagement time only when needed-improving NVH without compromising responsiveness. |
| Body Control Module Fault Handling | ADAS Sensor Interface Timing |
Use Scenario: Converting intermittent CAN bus error flags into stable hardware reset pulses for microcontroller watchdog supervision. IC Role / Device Role / Timing Role: Monostable converts short error bursts into clean, extended reset assertion (e.g., 100 ms), preventing spurious resets. Use Value: Eliminates false resets caused by transient bus faults while maintaining fast response to sustained communication loss. | Use Scenario: Conditioning raw radar sensor frame sync pulses before feeding to FPGA timing capture logic. IC Role / Device Role / Timing Role: Cleans jittery 10 MHz frame clocks using Schmitt-trigger inputs and generates clean, retriggerable strobes aligned to valid data windows. Use Value: Improves timing margin for high-speed LVDS data capture by removing sub-ns jitter and providing deterministic setup/hold windows. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar monostable multivibrator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 74HC123D-Q100 | CMOS input thresholds (VIH = 3.15 V min @ VCC = 4.5 V); higher supply range (2.0–6.0 V). | Better suited for mixed-voltage systems (e.g., 3.3 V MCU + 5 V peripherals); less tolerant of marginal TTL drive. | Select when interfacing with CMOS logic or wide-supply designs; avoid if driving from legacy 5 V TTL outputs with degraded VOH. |
| SN74LVC1G123DBVR | Single-channel, 5-pin SOT-23 package; lower ICC (max 10 μA), but no reset input or dual outputs. | Limited to space-constrained single-timing tasks; lacks independent reset and complementary outputs required for safety-critical redundancy. | Choose only for non-safety, low-power, single-event timing where board area is premium and reset independence is unnecessary. |
Compared with 74HC123D-Q100, the HCT variant ensures reliable triggering from standard TTL sources without level shifters, while SN74LVC1G123DBVR trades channel count and reset capability for ultra-small footprint-making the 74HCT123D-Q100 optimal for dual, reset-protected automotive timing where interface compatibility and functional safety are mandatory.
Availability
74HCT123D-Q100 is available at Aetrix Electronics and suitable for engine control units, transmission control modules, and body control modules requiring stable component supply across automotive production lifecycles.
Supply support for 74HCT123D-Q100 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance, reliable logic, analog, and MOSFET solutions optimized for automotive, industrial, and consumer applications.
The 74HCT123-Q100 product line delivers AEC-Q100 qualified retriggerable monostables specifically engineered for deterministic timing in harsh automotive environments-supporting ECU, ADAS, and electrification subsystems.
FAQ
What is the minimum external timing capacitor value supported for stable operation?
The datasheet specifies stable operation down to CEXT = 0 pF (with REXT = 5 kΩ), yielding a minimum pulse width of 75 ns. For CEXT < 50 pF, a power-up reset pulse is required to prevent spurious output. Practical minimum is 100 pF when used with REXT ≥ 2 kΩ to ensure adequate noise margin and consistent retrigger timing.
Can both channels share the same REXT/CEXT network?
No-each channel requires its own dedicated REXT and CEXT components. Pins 15/14 (Ch1) and 7/6 (Ch2) are electrically isolated timing nodes. Sharing would cause cross-talk, unpredictable pulse width interaction, and failure to meet AEC-Q100 reliability requirements due to uncontrolled current paths during retrigger events.
How does the Schmitt-trigger action improve noise immunity on nA/nB inputs?
Schmitt-trigger inputs provide ~1.67 V hysteresis at VCC = 4.5 V, meaning the rising threshold (VIH) is ~2.0 V and falling threshold (VIL) is ~0.33 V. This prevents multiple output toggles from slowly rising/falling noise on sensor or switch lines-ensuring one clean trigger per valid edge, even with >100 ns input rise times.
Is the DHVQFN package option (74HCT123BQ-Q100) pin-compatible with the SO16 version?
No-DHVQFN16 (SOT763-1) has different pin mapping: VCC appears on pins 1 and 16 (thermal pad), GND is on pin 8, and timing pins are rearranged (e.g., 1REXT/CEXT is pin 15 in SO16 but pin 13 in DHVQFN). Board redesign and layout verification are required; no mechanical or electrical drop-in replacement exists between SO16 and DHVQFN packages.
74HCT123D-Q100,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74HCT
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- Monostable
- Independent Circuits:
- 2
- Schmitt Trigger Input:
- Yes
- Propagation Delay:
- 65 ns
- Current - Output High, Low:
- 4mA, 4mA
- Voltage - Supply:
- 4.5 V ~ 5.5 V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SO
74HCT123D-Q100,115 FAQ
1.How can I place an order for 74HCT123D-Q100,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74HCT123D-Q100,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74HCT123D-Q100,115 reliable?
The price and inventory of 74HCT123D-Q100,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74HCT123D-Q100,115 is usually 5 days.
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Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74HCT123D-Q100,115?
For technical support, including 74HCT123D-Q100,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74HCT123D-Q100,115 requirements.
6.How does Aetrix verify that 74HCT123D-Q100,115 is sourced from the original manufacturer or authorized distributors?
All 74HCT123D-Q100,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74HCT123D-Q100,115 meets industry standards.
7.What is the process for return or replacement of 74HCT123D-Q100,115?
All 74HCT123D-Q100,115 units undergo pre-shipment inspection (PSI). If there is an issue with 74HCT123D-Q100,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74HCT123D-Q100,115 part is unused and in its original packaging.
Return procedure for 74HCT123D-Q100,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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