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Home > Products > Integrated Circuits (ICs) > Logic > Multivibrators

NXP Semiconductors 74HCT123N,652

Name: 74HCT123N,652
Brand: NXP Semiconductors
SKU: 74HCT123N,652
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: 74HCT123N,652

Manufacturer:: NXP Semiconductors

Category:: Multivibrators

Package:: 16-DIP (0.300", 7.62mm)

Datasheet:: 74HCT123N,652.pdf

Description:: IC MULTIVIBRATOR 77NS 16DIP

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Product details

Overview

74HCT123N,652 from NXP Semiconductors is a dual retriggerable monostable multivibrator with independent reset inputs, designed for precise pulse generation and timing control in TTL-compatible digital systems. It supports 4.5 V to 5.5 V supply operation, delivers sub-80 ns propagation delay at 5 V, features Schmitt-trigger inputs on A/B pins, and operates across −40 °C to +125 °C for industrial and automotive timing applications.

For engineers reviewing the 74HCT123N,652 datasheet, 74HCT123N,652 pinout, 74HCT123N,652 application, or 74HCT123N,652 equivalent, this page provides verified functional behavior, exact DIP16 package mapping, real-world retriggering constraints, and validated alternatives for pulse-width extension, reset-driven termination, and noise-immune edge detection in legacy and mixed-voltage logic designs.

Technical Context

The 74HCT123N,652 implements two independent monostable circuits, each with three trigger options: negative-edge (nA), positive-edge (nB), and reset-triggered (nRD) activation. Its internal timing relies on external R_EXT/C_EXT networks, enabling programmable pulse widths from ~75 ns to hundreds of microseconds - extended indefinitely via retriggering before timeout.

Schmitt-trigger action on nA/nB inputs ensures robustness against slow-rising signals, while the nRD input serves both as asynchronous reset (active LOW) and alternative positive-edge trigger. The device complies with JEDEC Std 7A and is TTL-input compatible, with VIH/VIL thresholds fixed at 2.0 V/0.8 V under 4.5–5.5 V operation.

Key Specifications

Parameter	Value and Actual Design Meaning
Supply Voltage	4.5 V to 5.5 V - Ensures direct compatibility with 5 V TTL and mixed-signal systems without level-shifting.
Propagation Delay (t_PHL/t_PLH)	23–77 ns at V_CC = 4.5–5.5 V - Enables reliable synchronization in sub-100 ns timing windows.
Input Thresholds (VIH/VIL)	2.0 V / 0.8 V - Matches standard TTL logic levels, eliminating need for interface buffers in LSTTL environments.
Operating Temperature	−40 °C to +125 °C - Qualified for under-hood automotive, industrial PLC, and high-reliability embedded control.
Output Drive Strength	±4 mA at V_CC = 4.5 V - Sufficient to drive multiple 74-series loads or small capacitive buses directly.
Timing Resistor Range	2 kΩ to 1000 kΩ - Supports wide pulse-width tuning from nanoseconds to milliseconds using standard E24 resistors.
ESD Protection	HBM >2000 V, MM >200 V - Provides robust handling during board assembly and field service without extra protection circuitry.

Pinout & Package

74HCT123N,652 uses the plastic dual in-line package (DIP16), SOT38-4, with 300 mil body width and through-hole mounting. Pin 1 is top-left corner with notch orientation.

Pin/Terminal	Circuit Role	Design Meaning
1A, 2A	Negative-edge triggered input	Accepts falling-edge pulses; enables edge-sensitive timing initiation without external inverters.
1B, 2B	Positive-edge triggered input	Accepts rising-edge pulses; allows synchronous triggering aligned with clock or data strobes.
1RD, 2RD	Active-LOW reset / positive-edge trigger	Terminates output pulse immediately when pulled LOW; also triggers new pulse on rising edge - dual-mode functionality.
1Q, 2Q	Active LOW outputs	Drive LOW during monostable period; suitable for enabling/disabling logic blocks or driving active-low enable pins.
1Q, 2Q	Active HIGH outputs	Complementary to Q outputs; simplifies interfacing with positive-logic peripherals or LEDs.
1CEXT, 2CEXT	External capacitor connection	Connects timing capacitor C_EXT; value directly sets base pulse width per t_W = K × R_EXT × C_EXT.
1REXT/CEXT, 2REXT/CEXT	Shared resistor/capacitor node	Single-pin connection point for R_EXT and C_EXT - reduces PCB routing complexity vs. separate nodes.
V_CC, GND	Power supply terminals	Decoupling required within 10 mm of pins 16/8; recommended 100 nF ceramic + 10 µF bulk capacitance.

Key Features

Feature	Design Value
Dual independent monostables	Enables two synchronized or isolated timing functions on one IC - reduces component count vs. discrete 555-based solutions.
Retriggerable operation up to 100 % duty factor	Allows indefinite pulse extension by repeated nA/nB edges - ideal for watchdog timeout stretching or variable-delay gating.
Direct reset termination	nRD LOW forces immediate output return to quiescent state - critical for fail-safe shutdown or emergency interrupt response.
Schmitt-trigger inputs on nA/nB	Rejects noise on slow-rising signals (e.g., mechanical switch bounce or long traces); eliminates need for external RC filtering.
TTL-compatible input thresholds	VIH = 2.0 V, VIL = 0.8 V at 5 V - interoperates seamlessly with 74LS, 74ALS, and microcontroller GPIOs without level translation.

Applications

Industrial Control Timing	Automotive Power Sequencing
Use Scenario: Generating precise enable delays for motor driver ICs during system power-up. IC Role / Device Role / Timing Role: Monostable #1 controls gate-drive enable timing; monostable #2 manages fault-clear window after overcurrent event. Use Value: Eliminates reliance on RC networks with ±20 % tolerance; achieves <±5 % pulse accuracy across temperature using stable film resistors and NP0 capacitors.	Use Scenario: Managing sequential activation of ECU subsystems (CAN transceiver → ADC → PWM controller) after ignition-on. IC Role / Device Role / Timing Role: Dual monostables provide cascaded, retriggerable delays - second stage only starts after first completes unless interrupted by reset. Use Value: Guarantees strict boot-order compliance while allowing dynamic extension if sensor self-test takes longer than expected.
Legacy System Glue Logic	Test Equipment Pulse Conditioning
Use Scenario: Converting single-shot TTL pulses from older test instruments into clean, jitter-free gated signals for DUT stimulus. IC Role / Device Role / Timing Role: nA input captures incoming trigger; nRD resets output before next cycle to prevent pulse stacking. Use Value: Replaces discrete 74LS123 + 74LS04 combinations with single IC, reducing board space and improving signal integrity.	Use Scenario: Extending narrow logic analyzer trigger pulses to match minimum acquisition window requirements of analog front-ends. IC Role / Device Role / Timing Role: Retriggering via nB on successive clock edges stretches output to cover full sampling interval. Use Value: Achieves deterministic pulse width >1 µs using 10 kΩ/100 nF network - avoids timing ambiguity in high-speed capture systems.

Industrial Control Timing

Automotive Power Sequencing

Use Scenario: Generating precise enable delays for motor driver ICs during system power-up.

IC Role / Device Role / Timing Role: Monostable #1 controls gate-drive enable timing; monostable #2 manages fault-clear window after overcurrent event.

Use Value: Eliminates reliance on RC networks with ±20 % tolerance; achieves <±5 % pulse accuracy across temperature using stable film resistors and NP0 capacitors.

Use Scenario: Managing sequential activation of ECU subsystems (CAN transceiver → ADC → PWM controller) after ignition-on.

IC Role / Device Role / Timing Role: Dual monostables provide cascaded, retriggerable delays - second stage only starts after first completes unless interrupted by reset.

Use Value: Guarantees strict boot-order compliance while allowing dynamic extension if sensor self-test takes longer than expected.

Legacy System Glue Logic

Test Equipment Pulse Conditioning

Use Scenario: Converting single-shot TTL pulses from older test instruments into clean, jitter-free gated signals for DUT stimulus.

IC Role / Device Role / Timing Role: nA input captures incoming trigger; nRD resets output before next cycle to prevent pulse stacking.

Use Value: Replaces discrete 74LS123 + 74LS04 combinations with single IC, reducing board space and improving signal integrity.

Use Scenario: Extending narrow logic analyzer trigger pulses to match minimum acquisition window requirements of analog front-ends.

IC Role / Device Role / Timing Role: Retriggering via nB on successive clock edges stretches output to cover full sampling interval.

Use Value: Achieves deterministic pulse width >1 µs using 10 kΩ/100 nF network - avoids timing ambiguity in high-speed capture systems.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual retriggerable monostable applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
74HC123N,652	CMOS version; VIH/VIL scale with V_CC (e.g., VIH ≈ 3.15 V at 4.5 V); wider supply range (2–6 V).	Better suited for mixed-voltage systems where V_CC may vary; less tolerant of noisy 5 V rails due to higher input thresholds.	Select when operating outside 4.5–5.5 V or interfacing with CMOS-only logic families.
SN74LV123AN	TI's low-voltage variant; guaranteed operation down to 1.65 V; VIH = 0.7×V_CC, VIL = 0.3×V_CC; max f_CLK = 50 MHz.	Optimized for 1.8 V/2.5 V domains; not pin-compatible with 74HCT123N,652 due to different pin 16 function (GND vs. V_CC).	Choose for ultra-low-power battery-operated equipment requiring sub-2 V timing, but verify layout changes.

Compared with 74HC123N,652 and SN74LV123AN, the 74HCT123N,652 uniquely balances TTL-level compatibility, industrial temperature range, and proven DIP16 reliability - making it the preferred choice for retrofitting legacy 5 V systems where pinout fidelity and noise margin are critical.

Availability

74HCT123N,652 is available at Aetrix Electronics and suitable for industrial control timing, automotive power sequencing, legacy system glue logic, and test equipment pulse conditioning requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for 74HCT123N,652 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in logic, interface, and timing ICs.

The 74HCT123N,652 belongs to NXP's legacy 74HCT logic family - engineered specifically for seamless integration into 5 V TTL-based systems requiring robust, retriggerable timing with industrial-grade reliability and JEDEC-compliant interoperability.

FAQ

What is the maximum pulse width achievable with 74HCT123N,652?

The 74HCT123N,652 has no inherent upper limit on output pulse width: its monostable outputs can be extended indefinitely via retriggering (nA or nB) before the initial timeout expires. With typical R_EXT = 100 kΩ and C_EXT = 100 nF, base pulse width reaches ~450 µs; repeated retriggering allows multi-second or even minute-long active periods - constrained only by external component stability and leakage.

Can 74HCT123N,652 operate reliably at 3.3 V supply?

No - the 74HCT123N,652 is specified only for 4.5 V to 5.5 V operation per its recommended conditions. At 3.3 V, input thresholds (VIH = 2.0 V, VIL = 0.8 V) become non-compliant, propagation delays increase unpredictably, and output drive falls below specification. For 3.3 V systems, consider SN74LVC123A or 74AUP1G123 variants instead of 74HCT123N,652.

How does the nRD pin function in 74HCT123N,652?

In the 74HCT123N,652, nRD serves two distinct roles: (1) As an active-LOW asynchronous reset - pulling nRD LOW immediately terminates the current output pulse and returns the output to quiescent state; (2) As a positive-edge trigger - a rising edge on nRD initiates a new monostable cycle, identical to nB behavior. This dual functionality enables flexible timing control without additional logic gates.

Is 74HCT123N,652 pin-compatible with 74LS123?

Yes - the 74HCT123N,652 is explicitly designed as a pin- and function-compatible replacement for 74LS123 in DIP16 packages. All 16 pins match identically in numbering, electrical role, and timing behavior. However, 74HCT123N,652 offers lower power consumption, improved noise immunity via Schmitt-trigger inputs, and extended temperature range (−40 °C to +125 °C vs. 0 °C to +70 °C).

What external components are required for basic operation of 74HCT123N,652?

Each monostable section of the 74HCT123N,652 requires one external timing resistor (R_EXT) and one external timing capacitor (C_EXT). These connect to pins 15/7 (1REXT/CEXT and 2REXT/CEXT) and pins 14/6 (1CEXT and 2CEXT). For stable operation, use 1 % metal-film resistors and NP0/C0G ceramic capacitors; decoupling (100 nF ceramic + 10 µF electrolytic) between V_CC (pin 16) and GND (pin 8) is mandatory.

74HCT123N,652 Specifications

Product attributes: Attribute value

Manufacturer:: NXP Semiconductors

Series:: 74HCT

Package/Case:: 16-DIP (0.300", 7.62mm)

Packaging:: Tube

Product Status:: Obsolete

Logic Type:: Monostable

Independent Circuits:: 2

Schmitt Trigger Input:: No

Propagation Delay:: 77 ns

Current - Output High, Low:: 4mA, 4mA

Voltage - Supply:: 4.5 V ~ 5.5 V

Operating Temperature:: -40°C ~ 125°C

Grade:: -

Qualification:: -

Mounting Type:: Through Hole

Supplier Device Package:: 16-DIP

74HCT123N,652 FAQ

1.How can I place an order for 74HCT123N,652 through Aetrix?

Please submit a Request for Quotation (RFQ) for 74HCT123N,652 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 74HCT123N,652 reliable?

The price and inventory of 74HCT123N,652 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74HCT123N,652 is usually 5 days.

3.What payment methods are accepted for 74HCT123N,652?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74HCT123N,652 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for 74HCT123N,652?

74HCT123N,652 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 74HCT123N,652 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 74HCT123N,652?

For technical support, including 74HCT123N,652 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74HCT123N,652 requirements.

6.How does Aetrix verify that 74HCT123N,652 is sourced from the original manufacturer or authorized distributors?

All 74HCT123N,652 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74HCT123N,652 meets industry standards.

7.What is the process for return or replacement of 74HCT123N,652?

All 74HCT123N,652 units undergo pre-shipment inspection (PSI). If there is an issue with 74HCT123N,652, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 74HCT123N,652 part is unused and in its original packaging.

Return procedure for 74HCT123N,652:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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